1. Introduction[edit | edit source]
STPMIC1L is a PMIC companion chip for STM32MP1 series with limited number of regulators (only 2 buck converters), so with restrictions on supported features for hardware designs without external regulators as no support of CPU DVFS or as limited support of low power modes without control of VDD_CPU.
Examples of hardware design of STPMIC1L with STM32MP13x lines 
can be found in AN6312 - How to use STPMIC1L for a wall adapter powered application on STM32MP13x lines MPUs or in the STMicroelectronics Discovery boards with STM32MP13x lines and STPMIC1L :
- MB2503: STM32MP135-DK with STPMIC1LD, overdrive mode with a external regulator
- MB2192: STM32MP135-DK with STPMIC1LA, no overdrive mode
In OpenSTLinux, the PMIC is a system resource managed by secure world connected (OP-TEE and TF-A); it must be connected to on a secure I2C, i.e. reserved to secure world.
It is the default configuration of all STMicroelectronic STM32MP13x lines boards and only for -ostl configuration present in of STMicroelectronic STM32MP15x lines boards (External device tree directory stm32mp1/ ).
So the board configuration is done in the device tree of each OpenSTLinux software components with:
- the PMIC hardware components configuration with STPMIC1L binding (compatible = "st,stpmic1l") in secure world, i.e. TF-A and OP-TEE
- the STM32MP1 low power mode configuration in OP-TEE device tree with pwr node
- configuration of regulator used by devices:
- OP-TEE, TF-A: regulator directly managed in secure world
(for example the DDR supplies in TF-A and VDD_CPU in OP-TEE) - OP-TEE: SCMI server configuration
- Linux kernel, U-boot: use SCMI regulator exported by OP-TEE
- OP-TEE, TF-A: regulator directly managed in secure world
 Information
|
| STPMIC1L is only supported in OP-TEE and TF-A with driver for STPMIC2 family (STPMIC1L, STPMIC2L, STPMIC25). OpenSTLinux doesn't support STPMIC1L in Linux kernel. |
2. Example of MB2503[edit | edit source]
This STM32MP135-DK with STPMIC1LD (MB2503) hardware design documentation can be found in www.st.com[1].
2.1. MB2503 configuration[edit | edit source]
The hardware configuration on this board is:
- VDD_CORE = BUCK1
- VDD_CPU = BUCK2
- VDD_DDR = external buck, managed by GPO1
We have the restrictions:
- CPU overdrive is supported with
- nominal (up to 650MHz): VDD_CPU at 1.25V
- overdrive (up to 1GHz): VDD_CPU at 1.35V
- System low power modes:
- LP-Stop mode: supported but not useful without regulator change (no VTT_DDR to stop)
- LPLV-Stop: VDD_CORE at 0.9V / VDD_CPU at 0.9V
- LPLV-Stop2: N/A
- Standby DDR SR: supported (Suspend in RAM)
- Standby DDR OFF: supported (Suspend in flash or shutdown with preserved backup domain)
2.2. MB2503 device trees[edit | edit source]
The associated device trees files are named stm32mp135f-dk-pmic1ld-ostl and are provided in the OpenSTLinux separate Git repository https://github.com/STMicroelectronics/dt-stm32mp:
- TF-A
- OP-TEE
- U-Boot
- stm32mp1/u-boot/stm32mp135f-dk-pmic1ld-ostl.dts (identical to Linux device tree)
- stm32mp1/u-boot/stm32mp135f-dk-pmic1ld-ostl-u-boot.dtsi
- Linux
With this default OP-TEE device tree, only the LPLV-Stop2 is not supported and the PMIC is powered off for a shutdown request with:
system_off_soc_mode = <STM32_PM_SHUTDOWN>;
To allow Standby with DDR off, the pwr_regulators node in OP-TEE device tree (stm32mp1/optee/stm32mp135f-dk-pmic1ld-ostl.dts ) is modified with:
&pwr_regulators { system_suspend_supported_soc_modes = < STM32_PM_CSLEEP_RUN STM32_PM_CSTOP_ALLOW_LP_STOP STM32_PM_CSTOP_ALLOW_LPLV_STOP //STM32_PM_CSTOP_ALLOW_LPLV_STOP2 is not supported STM32_PM_CSTOP_ALLOW_STANDBY_DDR_SR is not supported >; system_off_soc_mode = <STM32_PM_CSTOP_ALLOW_STANDBY_DDR_OFF>; };
2.3. MB2503 alternate configuration[edit | edit source]
The hardware configuration on MB2503 can change with resistances to save the VDD_DDR discrete regulator and to supply DDR with PMIC:
- VDD_CORE = BUCK1
- VDD_CPU = VDD_DDR = BUCK2
VDD_CPU should be set at 1.35V all the time; except when DDR is OFF.
So we have the restrictions:
- CPU overdrive is supported but with fixed VDD_CPU at 1.35V to supply also the DDR3L
- System low power modes:
- LPLV-Stop/LPLV-Stop2: N/A (no change of VDDCPU)
- Standby with DDR in self-refresh (suspend to RAM): N/A
(VDD_DDR is connected to VDD_CPU, it can't be stopped and VDD_CORE can't be stopped if VDD_CPUis present) - Standby with DDR OFF (suspend to flash): Supported
The impacts on device tree files are:
- Update PMIC and DDR nodes in TF-A device tree (tf-a/stm32mp135f-dk-pmic1ld-ostl.dts)
&ddr {
vdd-supply = <&vdd_cpu>;
};
...
&i2c4 {
...
status = "okay";
pmic1l: pmic@33 {
compatible = "st,stpmic1l";
reg = <0x33>;
status = "okay";
regulators {
...
vddcpu: buck2 {
regulator-name = "vddcpu";
regulator-min-microvolt = <1350000>;
regulator-max-microvolt = <1350000>;
regulator-always-on;
regulator-over-current-protection;
};
...
vdd_ddr: gpo1 {
regulator-name = "vdd_ddr";
regulator-min-microvolt = <1350000>;
regulator-max-microvolt = <1350000>;
regulator-always-on;
};
- Update PMIC and PWR nodes in OP-TEE device tree (optee/stm32mp135f-dk-pmic1ld-ostl.dts)
&i2c4 {
...
status = "okay";
pmic1l: pmic@33 {
compatible = "st,stpmic1l";
...
regulators {
...
vddcore: buck1 {
regulator-name = "vddcore";
regulator-min-microvolt = <1250000>;
regulator-max-microvolt = <1250000>;
regulator-always-on;
regulator-over-current-protection;
st,pwrctrl-sel = <1>;
st,pwrctrl-enable;
lp-stop {
regulator-on-in-suspend;
regulator-suspend-microvolt = <1250000>;
};
lplv-stop {
regulator-on-in-suspend;
regulator-suspend-microvolt = <900000>;
};
standby-ddr-sr {
regulator-off-in-suspend;
};
standby-ddr-off {
regulator-off-in-suspend;
};
};
vddcpu: buck2 {
regulator-name = "vddcpu";
regulator-min-microvolt = <1350000>;
regulator-max-microvolt = <1350000>;
regulator-always-on;
regulator-over-current-protection;
lp-stop {
regulator-on-in-suspend;
regulator-suspend-microvolt = <1250000>;
};
lplv-stop {
regulator-on-in-suspend;
regulator-suspend-microvolt = <900000>;
};
standby-ddr-sr {
regulator-off-in-suspend;
};
standby-ddr-off {
regulator-off-in-suspend;
};
};
vdd: ldo2 {
regulator-name = "vdd";
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
regulator-always-on;
st,mask-reset;
st,pwrctrl-sel = <0>;
};
v1v8_periph: ldo3 {
regulator-name = "v1v8_periph";
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <1800000>;
regulator-always-on;
st,pwrctrl-sel = <1>;
st,pwrctrl-enable;
lp-stop {
regulator-on-in-suspend;
};
lplv-stop {
regulator-on-in-suspend;
};
standby-ddr-sr {
regulator-off-in-suspend;
};
standby-ddr-off {
regulator-off-in-suspend;
};
};
vdd_usb: ldo4 {
regulator-name = "vdd_usb";
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
regulator-always-on;
st,pwrctrl-sel = <0>;
};
vdd_sd: ldo5 {
regulator-name = "vdd_sd";
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
regulator-always-on;
st,pwrctrl-sel = <1>;
st,pwrctrl-enable;
lp-stop {
regulator-off-in-suspend;
};
lplv-stop {
regulator-off-in-suspend;
};
standby-ddr-sr {
regulator-off-in-suspend;
};
standby-ddr-off {
regulator-off-in-suspend;
};
};
vdd_ddr: gpo1 {
regulator-name = "vdd_ddr";
regulator-min-microvolt = <1350000>;
regulator-max-microvolt = <1350000>;
regulator-always-on;
st,pwrctrl-sel = <1>;
st,pwrctrl-enable;
lp-stop {
regulator-on-in-suspend;
regulator-suspend-microvolt = <1350000>;
};
lplv-stop {
regulator-on-in-suspend;
regulator-suspend-microvolt = <1350000>;
};
standby-ddr-sr {
regulator-on-in-suspend;
regulator-suspend-microvolt = <1350000>;
};
standby-ddr-off {
regulator-off-in-suspend;
};
};
v3v3_sw: gpo2 {
regulator-name = "vgpo2";
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
regulator-always-on;
st,pwrctrl-sel = <1>;
st,pwrctrl-enable;
lp-stop {
regulator-on-in-suspend;
regulator-suspend-microvolt = <3300000>;
};
lplv-stop {
regulator-on-in-suspend;
regulator-suspend-microvolt = <3300000>;
};
standby-ddr-sr {
regulator-off-in-suspend;
};
standby-ddr-off {
regulator-off-in-suspend;
};
};
};
};
};
&pwr_regulators {
system_suspend_supported_soc_modes = <
STM32_PM_CSLEEP_RUN
STM32_PM_CSTOP_ALLOW_LP_STOP
//STM32_PM_CSTOP_ALLOW_LPLV_STOP is not supported
//STM32_PM_CSTOP_ALLOW_LPLV_STOP2 is not supported
//STM32_PM_CSTOP_ALLOW_STANDBY_DDR_SR is not supported
>;
system_off_soc_mode = <STM32_PM_SHUTDOWN>;
vdd-supply = <&vdd>;
vdd_3v3_usbfs-supply = <&vdd_usb>;
};
3. Example of MB2192[edit | edit source]
This STM32MP135-DK with STPMIC1LA (MB2192) hardware design documentation can be found in www.st.com[2].
3.1. MB2192 configuration[edit | edit source]
The hardware configuration on this board:
- VDD_CORE= VDD_CPU= BUCK1
- VDD_DDR= BUCK2
We have the restrictions:
- CPU overdrive is not supported with a fixed VDD_CPU at 1.25V
- Sytem low power modes:
- LPLV-Stop1/2: N/A (no change of VDD_CPU)
- Standby DDR SR (suspend to RAM): Supported
- Standby DDR OFF (suspend to flash): Supported
4. References[edit | edit source]
- ↑ STM32MP135-DK with STPMIC1LD (MB2503):
https://www.st.com/resource/en/hw_model/example-of-stpmic1ld-schematics-and-layout-on-stm32mp13xdf-up-to-1000-mhz.zip - ↑ STM32MP135-DK with STPMIC1LA (MB2192):
https://www.st.com/resource/en/hw_model/example-of-stpmic1la-schematics-and-layout-on-stm32mp13xac-up-to-650-mhz.zip
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