1. Article purpose[edit | edit source]
The STM32MP21xx device errata sheet[1] lists the different device limitations and explains the corresponding workarounds (software and/or hardware) if any.
The objective of this article is to explain which of the workarounds, described in this errata sheet, are applicable and implemented in ecosystem release v6.2.1
.
This article lists
- errata to be workaround by the customers,
- errata workaround implemented in STM32MPU Ecosystem releases,
- and errata not applicable in STM32MPU Ecosystem releases.
Errata, present in STM32MP21xx device errata sheet[1] and not listed in this article, have no workaround implemented in STM32MPU Ecosystem releases.
2. Legend[edit | edit source]
The section column refers to the number of the erratum chapter in the errata sheet document.
Rev.Y columns , present in the tables below, refer to the availability and status of a given errata workaround for the described erratum in errata sheet document:
- A = workaround available
- P = partial workaround available
- N = no workaround available
OpenSTLinux and CubeMP1 columns , present in the tables below, refer to the availability of a workaround for a given STM32MP13 ecosystem release:
- U = workaround to implement by User
- I = workaround Implemented
- NA= Errata Not Applicable in ST software release
Wave your mouse over a status in the table to display the corresponding legend.
3. Workarounds to implement by customer[edit | edit source]
| Function | Section | Limitation | Rev.Z | Comment | ||
|---|---|---|---|---|---|---|
| FMC | 2.5.1 | NOR flash memory/PSRAM incorrect bus turnaround timing | A | U | OpenSTLinux distribution: Delays to apply by customer at device tree level. | |
| OCTOSPI | 2.6.5 | Indirect write mode limited to 256 Mbytes | N | U | OpenSTLinux distribution: Memory with a density greater than 256 MB should be avoided. |
4. Workarounds implemented in STM32MP21 ecosystem releases[edit | edit source]
| Function | Section | Limitation | Rev.Z | Comment | ||
|---|---|---|---|---|---|---|
| OCTOSPI | 2.6.3 | Deadlock or write-data corruption after spurious write to a misaligned
address in OCTOSPI_AR register |
N | I | OpenSTLinux distribution: Misaligned addresses are handled at driver side when DQSE is set. | |
| 2.6.8 | Setting the ABORT bit does not generate an error on the AHB bus for
undefined-length incremental burst transfers |
P | I | OpenSTLinux distribution: The software waits for the end of the transfer before setting the ABORT bit. | ||
| LTDC | 2.9.1 | Ongoing AXI write never completes if disabling LTDC | A | I | OpenSTLinux distribution: Driver implemented to go through this problem. | |
| I2C | 2.13.1 | Wrong data sampling when data setup time (tSU;DAT) is shorter than one
I2C kernel clock period |
P | I | Workaround implemented in device tree with a clock tree that configures the I2C kernel clock source to a frequency higher than 20 MHz. |
5. Workarounds not applicable in STM32MP21 ecosystem releases[edit | edit source]
| Function | Section | Limitation | Rev.Z | Comment | ||
|---|---|---|---|---|---|---|
| SYSTEM | 2.1.6 | ATS12NSOPR instruction might incorrectly translate when the HCR.TGE bit is set | A | NA | Not applicable in OpenSTLinux, as boot is EL3 AArch64 only, while the errata requires EL3 AArch32. | |
| SYSTEM | 2.3.5 | ETHx kernel clock is gated if ETHxMACEN register bit is not set | A | NA | RCC, Ethernet (Linux® kernel, U‑Boot): ETHxMACEN bit is always enabled by default on all STM32 MPU platforms. | |
| FMC | 2.5.2 | Incorrect FMC_CLK clock period when CLKDIV value is changed on-the-fly in continuous clock mode | A | NA | OpenSTLinux distribution: CLKDIV cannot be changed on the fly, CLKDIV is configured when the driver is probed. | |
| OCTOSPI | 2.6.1 | Memory-mapped write error response when DQS output is disabled | P | NA | OpenSTLinux distribution: memory-mapped write is not used by the software. | |
| 2.6.2 | Memory wrap instruction not enabled when DQS is disabled | N | NA | OpenSTLinux distribution: memory wrap instruction is not used by the software. | ||
| 2.6.4 | Deadlock on consecutive out-of-range memory-mapped write operations | P | NA | OpenSTLinux distribution: memory-mapped write is not used by the software. | ||
| 2.6.6 | Read-modify-write operation does not clear the MSEL bit | A | NA | OpenSTLinux distribution: MSEL bit is never set by the software. | ||
| 2.6.7 | Automatic status-polling mode cannot be used with HyperFlash™ memories | N | NA | OpenSTLinux distribution: automatic status-polling mode is not used by the software with HyperFlash memories. | ||
| 2.6.9 | Read data corruption when a wrap transaction is followed by a linear read to the same MSB address | N | NA | OpenSTLinux distribution: memory wrap instruction is not used by the software. | ||
| 2.6.10 | Transactions are limited to 8 Mbytes in OctaRAM™ memories | N | NA | OpenSTLinux distribution: OctaRAM memories are not supported by the software (the driver is not available). | ||
| 2.6.11 | Variable latency is not supported when a refresh collision occurs during a write access to some OctaRAM™ memories | P | NA | OpenSTLinux distribution: OctaRAM memories are not supported by the software (the driver is not available). | ||
| SDMMC | 2.7.1 | Command response and receive data end bits not checked | N | NA | OpenSTLinux distribution: not an issue from software side, as it is not visible by the software. | |
| ADC | 2.8.1 | JEOS may be set before the last injected data are available in ADC_JDRx | A | NA | The injected mode is not supported in Linux ADC STM32MPx driver, These limitations have no impact on adc linux driver. | |
| 2.8.2 | In combined regular simultaneous plus alternate trigger mode, stopping injected conversion may delay regular conversion | A | NA | The injected mode is not supported in Linux ADC STM32MPx driver, These limitations have no impact on adc linux driver. | ||
| 2.8.3 | When the ADC clock is derived from the AHB clock, the injected conversion latency is not respected if the injected trigger coincides with the stopping of the regular conversion | A | NA | The injected mode is not supported in Linux ADC STM32MPx driver, These limitations have no impact on adc linux driver. | ||
| LPTIM | 2.11.2 | ARRM and CMPM flags are not set when APB clock is slower than kernel clock | A | NA | OpenSTLinux distribution: drivers not affected as repetition counter not used | |
| RTC | 2.12.1 | Alarm flag may be repeatedly set when the core is stopped in debug | N | NA | OpenOCD does not stop any device during debug so, even if one device send an interrupt (likethe RTC alarm), OpenOCD is able to continue. | |
| I2C | 2.13.2 | Spurious bus error detection in controller mode | A | NA | In order to get real bus error notifications, this workaround is not implemented in the OpenSTLinux distribution. | |
| USART | 2.14.1 | Wrong data received by SPI slave receiver in autonomous mode with CPOL = 1 | A | NA | OpenSTLinux distribution: SPI slave mode is not implemented. | |
| 2.14.2 | Received data may be corrupted upon clearing the ABREN bit | A | NA | OpenSTLinux distribution: condition never reached in Linux OS thanks to the specific implementation (ABREN bit never cleared in USART_CR2 register). | ||
| 2.14.3 | Noise error flag set while ONEBIT is set | A | NA | OpenSTLinux distribution: not applicable as the Linux framework does not handle the noise error indication. | ||
| LPUART | 2.15.1 | Possible LPUART transmitter issue when using low BRR[15:0] value | P | NA | OpenSTLinux distribution: LPUART kernel clock and baudrate ratio prevent these cases. To reach these cases, LPUART kernel clock should be 3 or 4 times greater than the baudrate, but LPUART kernel clock sources are ≥ 16 MHz. | |
| SPI | 2.16.1 | RDY output failure at high serial clock frequency | N | NA | The APB clock and SPI kernel clock ratio defined in the OpenSTLinux distribution prevent these cases from occurring. The APB clock is set to 200 MHz, and the SPI kernel clock is set to either 133 MHz or 200 MHz. | |
| FDCAN | 2.17.1 | Desynchronization under specific condition with edge filtering enabled | A | NA | In driver CAN used for STM32MPU platforms, bit CCCR_EFBI is never set, so no issue possible. | |
| 2.17.2 | Tx FIFO messages inverted under specific buffer usage and priority setting | A | NA | The workaround is inherently implemented in the Linux m_can driver, because on M_CAN IP v3.1+ (we are in v3.2 version on our hardware) transmission is configured and handled in TX FIFO mode only, so the erratum condition requiring mixed dedicated TX buffers and TX FIFO operation cannot occur by design. | ||
| 2.17.3 | DAR mode transmission failure due to lost arbitration | A | NA | The DAR mode lost-arbitration workaround is not implemented in the current Linux m_can driver, because although one-shot mode enables DAR, the driver does not perform the required recovery sequence of clearing the pending transmission request in TXBRP, handling the corresponding cancellation status in TXBCF, and explicitly restarting the transmission. | ||
| ETH | 2.19.1 | Incorrect gate control list switching for intermediate cycles when CTR is less than the GCL execution time | A | NA | The DWMAC EST erratum workaround does not appear to be implemented in the current Linux stmmac driver, because the driver programs the cycle time directly from the TAPRIO configuration without checking or adjusting it to ensure that CTR is either equal to the sum of the fully executed GCL intervals or greater than that sum by at least 8 PTP clock periods. |