Last edited 4 months ago

USB2PHY internal peripheral

Applicable for STM32MP25x lines

1. Article purpose[edit | edit source]

The purpose of this article is to:

  • briefly introduce the USB2PHY peripheral and its main features,
  • indicate the peripheral instances assignment at boot time and their assignment at runtime (including whether instances can be allocated to secure contexts),
  • list the software frameworks and drivers managing the peripheral,
  • explain how to configure the peripheral.

2. Peripheral overview[edit | edit source]

The USB2PHY peripheral is a block that contains a USB high-speed UTMI+ PHY. It makes the interface between:

  • the internal USB controllers (USBH and USB3DR),
  • the external USB physical lines (DP, DM).

Two instances of USB2PHY peripheral inside STM32MP25x lines More info.png:

  • USB2PHY1 connected to the USBH controller,
  • USB2PHY2 connected to the USB3DR controller for USB2.0 speeds.

USB2PHY.png

Refer to the STM32 MPU reference manuals for the complete list of features, and to the software frameworks and drivers, introduced below, to see which features are implemented.

3. Peripheral usage[edit | edit source]

This chapter is applicable in the scope of the OpenSTLinux BSP running on the Arm® Cortex®-A processor(s), and the STM32CubeMPU Package running on the Arm® Cortex®-M processor.

3.1. Boot time assignment[edit | edit source]

3.1.1. On STM32MP25x lines More info.png[edit | edit source]

One USB2PHY instance, that is, USB2PHY2, is a boot device that support Flash programming with STM32CubeProgrammer.

The USB2PHY2 instance is used by ROM code, FSBL and SSBL when using USB3DR in Device mode (DFU).


Click on How to.png to expand or collapse the legend...

  • means that the peripheral can be assigned to the given boot time context.
  • means that the peripheral is assigned by default to the given boot time context and that the peripheral is mandatory for the STM32 MPU Embedded Software distribution.
  • means that the peripheral can be assigned to the given boot time context, but this configuration is not supported in STM32 MPU Embedded Software distribution.
  • is used for system peripherals that cannot be unchecked because they are hardware connected in the device.

The present chapter describes STMicroelectronics recommendations or choice of implementation. Additional possibilities might be described in STM32MP25 reference manuals.

Domain Peripheral Boot time allocation Comment How to.png
Instance Cortex-A35
secure
(ROM code)
Cortex-A35
secure
(TF-A BL2)
Cortex-A35
non-secure
(U-Boot)
High speed interface USB2PHY Info.png USB2PHY1 USB2PHY1 can be used in U-boot by USBH with command line tools.
USB2PHY2 USB2PHY2 can be used by ROM code, FSBL and SSBL in DFU mode to support serial boot.
It can be used also in U-boot by USB3DR with command line tools.

3.2. Runtime assignment[edit | edit source]

3.2.1. On STM32MP25x lines More info.png[edit | edit source]

Click on How to.png to expand or collapse the legend...

STM32MP25 internal peripherals

Check boxes illustrate the possible peripheral allocations supported by STM32 MPU Embedded Software:

  • means that the peripheral can be assigned to the given runtime context.
  • means that the peripheral is assigned by default to the given runtime context and that the peripheral is mandatory for the STM32 MPU Embedded Software distribution.
  • means that the peripheral can be assigned to the given runtime context, but this configuration is not supported in STM32 MPU Embedded Software distribution.
  • is used for system peripherals that cannot be unchecked because they are hardware connected in the device.

The present chapter describes STMicroelectronics recommendations or choice of implementation. Additional possibilities might be described in STM32MP25 reference manuals.

Domain Peripheral Runtime allocation Comment How to.png
Instance Cortex-A35
secure
(OP-TEE /
TF-A BL31)
Cortex-A35
non-secure
(Linux)
Cortex-M33
secure
(TF-M)
Cortex-M33
non-secure
(STM32Cube)
Cortex-M0+
Warning.png
(STM32Cube)
High speed interface USB2PHY Info.png USB2PHY1 OP-TEE
TF-A BL31
Not a RIF aware, used as per allocation of USBH
USB2PHY2 OP-TEE
TF-A BL31
Not a RIF aware, used as per allocation of USB3DR

4. Software frameworks and drivers[edit | edit source]

Below are listed the software frameworks and drivers managing the USB2PHY peripheral for the embedded software components listed in the above tables.

5. How to assign and configure the peripheral[edit | edit source]

The peripheral assignment can be done via the STM32CubeMX graphical tool (and manually completed if needed).
This tool also helps to configure the peripheral by generating:

  • partial device trees (pin control and clock tree) for the OpenSTLinux software components,
  • HAL initialization code for the STM32CubeMPU Package.

The configuration is applied by the firmware running in the context in which the peripheral is assigned.

For U-boot and Linux kernel configuration, please refer to USB2PHY device tree configuration.

6. References[edit | edit source]