DDRPERFM device tree configuration

Applicable for

STM32MP13x lines, STM32MP15x lines, STM32MP21x lines, STM32MP23x lines, STM32MP25x lines

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1. Article purpose

This article explains how to configure the STM32 DDR PMU driver when the peripheral is assigned to the Linux^® OS.

The configuration is performed using the device tree mechanism, which provides a hardware description of the peripheral used by the STM32 DDR PMU driver.

2. DT bindings documentation

The DDRPERFM device tree bindings are composed of:

• STM32 DDR PMU device tree bindings.

3. DT configuration

This hardware description is a combination of the Linux kernel STM32 microprocessor device tree files (.dtsi extension), OP-TEE RIF device tree files (for STM32MP23x lines  and STM32MP25x lines  .dtsi extension) and Linux kernel board device tree files (.dts extension). See the Device tree for an explanation of the device tree file split.

STM32CubeMX can be used to generate the board device tree. Refer to How to configure the DT using STM32CubeMX for more details.

3.1. DT configuration (STM32 level)

The DDRPERFM node, as perf node, is composed of several parts, listed in chapters below.

3.1.1. STM32 DDRPERFM RIF configuration

On STM32MP23x lines  and STM32MP25x lines , the DDRPERFM peripheral clock is shared with the DDRCTRL_and_DDRPHYC_internal_peripherals.
By default, ST bootloaders enables only secure access to this clock resource. To allow Linux to probe the stm32_ddr_pmu driver, it is required to enable nonsecure access to the clock. This can be done in OP-TEE with this RCC RIF node configuration on resource 104 :

&rcc {
    st,protreg = <
        //...
        RIFPROT(RIF_RCC_RESOURCE(104), RIF_UNUSED, RIF_UNLOCK, RIF_NSEC, RIF_PRIV, RIF_UNUSED, RIF_SEM_DIS, RIF_CFDIS)
        //...
    >;
};

On STM32MP13x lines , STM32MP15x lines  and STM32MP21x lines , the stm32_ddr_pmu driver probes without any needed RIF configuration.

3.1.2. STM32 DDRPERFM board configuration

On STM32MP23x lines  and STM32MP25x lines , according to STM32 DDR PMU device tree bindings, the RAM type must be specified through the "st,dram-type" vendor property:

perf@480c0000 {
    compatible = "st,stm32mp25-ddr-pmu";
    reg = <0x480c0000 0x0 0x400>;
    clocks = <&rcc CK_BUS_DDRPERFM>;
    resets = <&rcc DDRPERFM_R>;
    access-controllers = <&rifsc 67>;
    st,dram-type = <0>;
    status = "disabled";
};

Doubledata rate (memory domain)

Power management unit (in STPMIC context) or performance monitoring unit (in Arm^® Cortex^®-A context)

Linux^® is a registered trademark of Linus Torvalds.

Operating system

Device tree

Open portable trusted execution environment

Resource isolation framework

Reset and clock control

Random access memory (Early computer memories generally hadserial access. Memories where any given address can be accessed when desired were then called "random access" to distinguish them from the memories where contents can only be accessed in a fixed order. The term is used today for volatile random-acces ssemiconductor memories.)

Doubledata rate (memory domain)

Power management unit (in STPMIC context) or performance monitoring unit (in Arm^® Cortex^®-A context)

Linux^® is a registered trademark of Linus Torvalds.

Operating system

Device tree

Open portable trusted execution environment

Resource isolation framework

Reset and clock control

Random access memory (Early computer memories generally hadserial access. Memories where any given address can be accessed when desired were then called "random access" to distinguish them from the memories where contents can only be accessed in a fixed order. The term is used today for volatile random-acces ssemiconductor memories.)

Arm^® is a registered trademark of Arm Limited (or its subsidiaries) in the US and/or elsewhere.

Cortex^®