- Last edited 5 months ago ago
STM32MP15 microprocessors are based on the Arm®Cortex®-A7 dual core. They support Trustzone mode for secure operations, a Vivante GPU and an Arm®Cortex®-M4 coprocessor.
Then technical aspects are introduced, providing information on:
- STM32MP15 documentation
- articles dedicated to Internal peripherals that make the transition towards the software frameworks required to control these peripherals
- the list of boards supporting STM32MP15 devices
- the supported software distributions, that can be downloaded into the STM32MP15 device.
- 1 Introduction
- 2 Part number codification
- 3 Block diagram
- 4 Technical documentation
- 5 Internal peripherals
- 6 How to get further with STM32MP15 ecosystem
- 7 References and foot notes
STM32MP15x microprocessors are targeting industry 4.0, factory automation, smart metering, smart homes and electric vehicle charging infrastructure applications.
They are based on the flexible architecture of a Dual Arm® Cortex®-A7 core running up to 800 MHz and Cortex®-M4 at 209 MHz combined with a dedicated 3D graphics processing unit (GPU) and MIPI-DSI display interface.
2 Part number codification
The table below shows the STM32MP15 microprocessor different part numbers available, together with their corresponding internal peripherals, security options and packages.
2.1 STM32MP15x lines
Cortex-A7 Cortex-M4 GPU Display CAN STM32MP151 Single Yes No TFT No STM32MP153 Dual Yes No TFT Yes STM32MP157 Dual Yes Yes TFT/DSI Yes
2.2 Security and Cortex-A7 frequency
Security Cortex-A7 frequency STM32MP15xA Basic 650 MHz STM32MP15xC Secure boot + Cryptography (CRYP) 650 MHz STM32MP15xD Basic 800 MHz STM32MP15xF Secure boot + Cryptography (CRYP) 800 MHz
STM32MP15xxAA TFBGA448 18x18 STM32MP15xxAB LFBGA354 16x16 STM32MP15xxAC TFBGA361 12x12 STM32MP15xxAD TFBGA257 10x10
2.4 Junction temperature
3 Block diagram
Here below is the STM32MP157F block diagram offering the richest features set of the STM32MP15 microprocessor.
The above figure shows a functional view of the design that does not aim to be aligned with the real design: it shows the available features and not how they are implemented into the microprocessor.
For instance, SPDIF RX and SPDIF TX functions are grouped in a single box, whereas, SPDIF RX is implemented in one dedicated peripheral, and SPDIF TX is supported by SAI.
4 Technical documentation
- STM32MP15 Reference Manual: device and internal peripheral user specifications
- STM32MP15 Datasheet: electrical characteristics, package and pinout descriptions
The whole documentation set, related to STM32MP15x lines , is available also on st.com 
5 Internal peripherals
STM32MP15 peripherals overview article gives a description of all the internal peripherals available on STM32MP15 devices, with direct links to the articles where you can find:
- an overview of each peripheral
- the list of instances available for each peripheral type,
- information on the way each instance can be shared between Arm® Cortex®-A7 and Cortex®-M4 cores,
- direct links to the software frameworks used to control the peripheral from different Arm® cores and security modes such as Cortex®-A7 non secure, Cortex®-A7 secure or Cortex®-M4 (non secure).
6 How to get further with STM32MP15 ecosystem
The list of boards that integrate STM32MP15 devices can be found in STM32MP15 boards article.
6.2 Supported software distributions
STM32MPU Embedded Software distribution
STM32MPU Embedded Software distribution for Android
Click the links above to find information on:
- Distribution composition and associated software architecture
- Associated release notes
7 References and foot notes
- Exposure to maximum rating conditions for extended periods may affect device reliability. Device mission profile (application conditions) is compliant with JEDEC JESD47 qualification standard. Refer to the STM32MP15 Datasheet and AN5438 for further information.
- 800 MHz part numbers are only available with '1' as junction temperatures range suffix (- 20 to + 105 °C).
- STM32MP15 resources on st.com