- Last edited one month ago ago
1 Article purpose
The purpose of this article is to:
- briefly introduce the Arm® Cortex®-M4 core and its main features
- indicate the level of security supported by this processor
2 Peripheral overview
The Cortex-M4 is a 32-bit processor that belongs to the Armv7E-M architecture family. Armv7E-M corresponds to the ARMv7-M architecture, with DSP extension. Among a wide range of features, it includes a memory protection unit (MPU) and a single-precision floating point unit (FPU).
Refer to the STM32MP15 reference manuals for the complete list of features.
2.2 Security support
The Cortex-M4 does not support secure mode: it only supports a non-secure mode that defines the Cortex-M4 non-secure hardware execution context.
3 Peripheral usage and associated software
3.1 Boot time
The coprocessor startup can be done at two different stages of the boot chain:
- by U-Boot SSBL, as explained in the How to start the coprocessor from the bootloader article
- by Linux remoteproc, by default
The Cortex-M4 runs the STM32CubeMP1 package.
The Cortex-M4 operates as a coprocessor, either autonomously as any external microcontroller (such as an STM32F4) could, or communicating with the main processor (Cortex-A7) via the RPMsg communication pipe.
3.2.2 Software frameworks
3.2.3 Peripheral configuration
The Cortex-M4 configuration is done in two steps:
- As the main processor of the system, the Cortex-A7 (running OpenSTLinux distribution) first takes care of the initialization of all system resources: supplies, clock tree, and so on.
- The STM32CubeMP1 package then takes care of all the Cortex-M4 local configuration (NVIC, MPU, and so on). It can rely on the resource manager to modify system resources without interfering with the Cortex-A7.
3.2.4 Peripheral assignment
The Cortex-M4 is the Cortex-A7's coprocessor, so it cannot assign peripheral to its usage but it manages all the peripherals assigned to its context.
4 How to go further
Refer to the Arm website for more detailed information on this core.