Last edited 3 months ago

DCMIPP device tree configuration

Applicable for STM32MP13x lines, STM32MP25x lines

1. Article purpose[edit source]

This article explains how to configure the DCMIPP internal peripheral when assigned to the Linux® OS. In that case, it is controlled by the V4L2 camera framework.

The configuration is performed using the device tree mechanism that provides a hardware description of the DCMIPP peripheral, used by the STM32 DCMIPP Linux driver or by the V4L2 camera framework.

If the peripheral is assigned to another execution context, refer to How to assign an internal peripheral to an execution context article for guidelines on peripheral assignment and configuration.

2. DT bindings documentation[edit source]

The DCMIPP internal peripheral is documented through the STM32 DCMIPP device tree bindings file[1].

3. DT configuration[edit source]

This hardware description is a combination of the STM32 microprocessor device tree files (.dtsi extension) and board device tree files (.dts extension). See the device tree article for an explanation of the device tree file split.

STM32CubeMX can be used to generate the board device tree. Refer to How to configure the DT using STM32CubeMX for more details.

3.1. DT configuration (STM32/SoC level)[edit source]

The DCMIPP node is located in the device tree file for the software components, supporting the peripheral and listed in the above DT bindings documentation paragraph.

For STM32MP13x lines More info.png, The DCMIPP device tree node is declared in stm32mp135.dtsi [2]. The declaration (shown below) provides the hardware registers base address, interrupts, reset line and clocks used.

...
	soc {
		etzpc: etzpc@5c007000 {
			dcmipp: dcmipp@5a000000 {
				compatible = "st,stm32mp13-dcmipp";
				reg = <0x5a000000 0x400>;
				interrupts = <GIC_SPI 79 IRQ_TYPE_LEVEL_HIGH>;
				resets = <&rcc DCMIPP_R>;
				clocks = <&rcc DCMIPP_K>;
				clock-names = "kclk";
				feature-domains = <&etzpc STM32MP1_ETZPC_DCMIPP_ID>;
				status = "disabled";
			};
...

For STM32MP25x lines More info.png, The DCMIPP device tree node is declared in stm32mp251.dtsi [3]. The declaration (shown below) provides the hardware registers base address, interrupts, reset line and clocks used.

...
		rifsc: rifsc@42080000 {
			dcmipp: dcmipp@48030000 {
				compatible = "st,stm32mp25-dcmipp";
				reg = <0x48030000 0x1000>;
				interrupts = <GIC_SPI 198 IRQ_TYPE_LEVEL_HIGH>;
				resets = <&rcc DCMIPP_R>;
				clocks = <&rcc CK_BUS_DCMIPP>, <&rcc CK_KER_CSI>;
				clock-names = "kclk", "mclk";
				feature-domains = <&rifsc STM32MP25_RIFSC_DCMIPP_ID>;
				power-domains = <&CLUSTER_PD>;
				status = "disabled";
			};
...
Warning white.png Warning
This device tree part is related to STM32 microprocessors. It must be kept as is, without being modified by the end-user.

When using a different sensor camera device, only the sensor-related configuration part must be adapted in the associated board device tree file (see #DT configuration (board level)).

Refer to stm32-dcmipp bindings[1] for more details.

3.2. DT configuration (board level)[edit source]

3.2.1. For STM32MP13x lines More info.png[edit source]

&dcmipp {
	status = "okay";
	pinctrl-names = "default", "sleep";
	pinctrl-0 = <&dcmipp_pins_a>;
	pinctrl-1 = <&dcmipp_sleep_pins_a>;
	port {
		dcmipp_0: endpoint {
			remote-endpoint = <&mipid02_2>;
			bus-width = <8>;
			hsync-active = <0>;
			vsync-active = <0>;
			pclk-sample = <0>;
			pclk-max-frequency = <120000000>;
		};
	};
};
...

&i2c5 {
	pinctrl-names = "default", "sleep";
	pinctrl-0 = <&i2c5_pins_a>;
	pinctrl-1 = <&i2c5_sleep_pins_a>;
	i2c-scl-rising-time-ns = <170>;
	i2c-scl-falling-time-ns = <5>;
	clock-frequency = <400000>;
	status = "okay";
	/* spare dmas for other usage */
	/delete-property/dmas;
	/delete-property/dma-names;

	stmipi: stmipi@14 {
		compatible = "st,st-mipid02";
		reg = <0x14>;
		status = "okay";
		clocks = <&clk_mco1>;
		clock-names = "xclk";
		VDDE-supply = <&scmi_v1v8_periph>;
		VDDIN-supply = <&scmi_v1v8_periph>;
		reset-gpios = <&mcp23017 2 (GPIO_ACTIVE_LOW | GPIO_PUSH_PULL)>;

		ports {
			#address-cells = <1>;
			#size-cells = <0>;
			port@0 {
				reg = <0>;

				mipid02_0: endpoint {
					data-lanes = <1 2>;
					lane-polarities = <0 0 0>;
					remote-endpoint = <&gc2145_ep>;
				};
			};
			port@2 {
				reg = <2>;

				mipid02_2: endpoint {
					bus-width = <8>;
					hsync-active = <0>;
					vsync-active = <0>;
					pclk-sample = <0>;
					remote-endpoint = <&dcmipp_0>;
				};
			};
		};
	};

	gc2145: gc2145@3c {
		compatible = "galaxycore,gc2145";
		reg = <0x3c>;
		clocks = <&clk_ext_camera>;
		IOVDD-supply = <&scmi_v3v3_sw>;
		AVDD-supply = <&scmi_v3v3_sw>;
		DVDD-supply = <&scmi_v3v3_sw>;
		powerdown-gpios = <&mcp23017 3 (GPIO_ACTIVE_LOW | GPIO_PUSH_PULL)>;
		reset-gpios = <&mcp23017 4 (GPIO_ACTIVE_LOW | GPIO_PUSH_PULL)>;
		status = "okay";

		port {
			gc2145_ep: endpoint {
				remote-endpoint = <&mipid02_0>;
				clock-lanes = <0>;
				data-lanes = <1 2>;
			};
		};
	};

	ov5640: camera@3c {
		compatible = "ovti,ov5640";
		reg = <0x3c>;
		clocks = <&clk_ext_camera>;
		clock-names = "xclk";
		DOVDD-supply = <&scmi_v3v3_sw>;
		status = "disabled";
		powerdown-gpios = <&mcp23017 3 (GPIO_ACTIVE_LOW | GPIO_PUSH_PULL)>;
		reset-gpios = <&mcp23017 4 (GPIO_ACTIVE_LOW | GPIO_PUSH_PULL)>;

		port {
			ov5640_0: endpoint {
				/*remote-endpoint = <&mipid02_0>;*/
				clock-lanes = <0>;
				data-lanes = <1 2>;
			};
		};
	};

This section, part of the STM32MP135x-DK Discovery kit More info green.png device tree file[4], shows how is configured the DCMIPP hardware block to interconnect with a serial CSI-2 camera sensor through the ST-Microelectronics MIPID02 CSI-2 to parallel bridge. The configurable settings are the following:

  • Camera sensor endpoint:
    • GalaxyCore GC2145 node with "okay" for "status":
      • The GalaxyCore GC2145 model[5].
      • Number of CSI-2 data lanes: 1 or 2
      • Lanes polarity: active low (0) or active high (1)
    • Omnivision OV5640 node with "okay" for "disabled":
      • The Omnivision OV5640 model[6].
      • Number of CSI-2 data lanes: 1 or 2
      • Lanes polarity: active low (0) or active high (1)

This section also defines what is the DCMIPP pins multiplexing used for this board (<&dcmipp_pins_a>, <&dcmipp_sleep_pins_a>), exact pins details being defined in the STM32MP135x-DK Discovery kit More info green.png pinctrl device tree file[7]:

&pinctrl {
...
	dcmipp_pins_a: dcmi-0 {
		pins1 {
			pinmux = <STM32_PINMUX('H',  8,  AF13)>,/* DCMI_HSYNC */
				 <STM32_PINMUX('G',  9,  AF13)>,/* DCMI_VSYNC */
				 <STM32_PINMUX('B',  7,  AF14)>,/* DCMI_PIXCLK */
				 <STM32_PINMUX('A',  9,  AF13)>,/* DCMI_D0 */
				 <STM32_PINMUX('D',  0,  AF13)>,/* DCMI_D1 */
				 <STM32_PINMUX('G', 10,  AF13)>,/* DCMI_D2 */
				 <STM32_PINMUX('E',  4,  AF13)>,/* DCMI_D3 */
				 <STM32_PINMUX('D', 11,  AF14)>,/* DCMI_D4 */
				 <STM32_PINMUX('D',  3,  AF13)>,/* DCMI_D5 */
				 <STM32_PINMUX('B',  8,  AF13)>,/* DCMI_D6 */
				 <STM32_PINMUX('E', 14,  AF13)>;/* DCMI_D7 */
			bias-disable;
		};
	};

	dcmipp_sleep_pins_a: dcmi-sleep-0 {
		pins1 {
			pinmux = <STM32_PINMUX('H',  8,  ANALOG)>,/* DCMI_HSYNC */
				 <STM32_PINMUX('G',  9,  ANALOG)>,/* DCMI_VSYNC */
				 <STM32_PINMUX('B',  7,  ANALOG)>,/* DCMI_PIXCLK */
				 <STM32_PINMUX('A',  9,  ANALOG)>,/* DCMI_D0 */
				 <STM32_PINMUX('D',  0,  ANALOG)>,/* DCMI_D1 */
				 <STM32_PINMUX('G', 10,  ANALOG)>,/* DCMI_D2 */
				 <STM32_PINMUX('E',  4,  ANALOG)>,/* DCMI_D3 */
				 <STM32_PINMUX('D', 11,  ANALOG)>,/* DCMI_D4 */
				 <STM32_PINMUX('D',  3,  ANALOG)>,/* DCMI_D5 */
				 <STM32_PINMUX('B',  8,  ANALOG)>,/* DCMI_D6 */
				 <STM32_PINMUX('E', 14,  ANALOG)>;/* DCMI_D7 */
		}; 
};

An alternate pin multiplexing could be defined (for example to fit a new board design) by modifying the STM32MP135x-DK Discovery kit More info green.png pinctrl device tree file[7] following the possible pins assignment defined in the MPU datasheet[8].

3.2.2. For STM32MP25x lines More info.png[edit source]

For STM32MP25x lines More info.png, a full example of the STM32MP257 Evaluation board device tree is available in stm32mp257f-ev1.dts [9]. We can found:

...
&csi2host {
	vdd-supply =  <&scmi_vddcore>;
	vdda18-supply = <&scmi_v1v8>;
	status = "okay";
	ports {
		#address-cells = <1>;
		#size-cells = <0>;
		port@0 {
			reg = <0>;
			csi2host_sink: endpoint {
				remote-endpoint = <&imx335_ep>;
				data-lanes = <0 1>;
				bus-type = <4>;
			};
		};
		port@1 {
			reg = <1>;
			csi2host_source: endpoint {
				remote-endpoint = <&dcmipp_0>;
			};
		};
	};
};

&dcmipp {
	status = "okay";
	port {
		dcmipp_0: endpoint {
			remote-endpoint = <&csi2host_source>;
			bus-type = <4>;
		};
	};
};
...
&i2c2 {
	pinctrl-names = "default", "sleep";
	pinctrl-0 = <&i2c2_pins_a>;
	pinctrl-1 = <&i2c2_sleep_pins_a>;
	i2c-scl-rising-time-ns = <100>;
	i2c-scl-falling-time-ns = <13>;
	clock-frequency = <400000>;
	status = "okay";
	/* spare dmas for other usage */
	/delete-property/dmas;
	/delete-property/dma-names;

	imx335: imx335@1a {
		compatible = "sony,imx335";
		reg = <0x1a>;
		clocks = <&clk_ext_camera>;
		reset-gpios = <&gpioi 7 (GPIO_ACTIVE_HIGH | GPIO_PUSH_PULL)>;
		powerdown-gpios = <&gpioi 0 (GPIO_ACTIVE_HIGH | GPIO_PUSH_PULL)>;
		status = "okay";

		port {
			imx335_ep: endpoint {
				remote-endpoint = <&csi2host_sink>;
				clock-lanes = <0>;
				data-lanes = <1 2>;
				link-frequencies = /bits/ 64 <594000000>;
			};
		};
	};
...
Info white.png Information
The DCMIPP can also be connected to a parallel sensor.
Under construction.png Add information regarding the pinctrl file related to parallel sensor GPIOs.

3.2.3. STM32CubeMX pins configurator[edit source]

STM32CubeMX [10] pins configurator is of great help to find valid alternatives thanks to its visual GUI.

Refer to STM32 DCMIPP bindings[1] for more details.

3.3. DT configuration examples[edit source]

	ov5640: camera@3c {
		compatible = "ovti,ov5640";
		reg = <0x3c>;
		clocks = <&clk_ext_camera>;
		clock-names = "xclk";
		DOVDD-supply = <&scmi_v3v3_sw>;
		status = "okay";
		powerdown-gpios = <&mcp23017 3 (GPIO_ACTIVE_LOW | GPIO_PUSH_PULL)>;
		reset-gpios = <&mcp23017 4 (GPIO_ACTIVE_LOW | GPIO_PUSH_PULL)>;

		port {
			ov5640_0: endpoint {
				/*remote-endpoint = <&mipid02_0>;*/
				clock-lanes = <0>;
				data-lanes = <1 2>;
			};
		};
	};

This section, part of the STM32MP135x-DK Discovery kit More info green.png device tree file[4], enables the support of the OV5640 Omnivision camera sensor[6] located on the MB1723 camera daughter board connected to the CN1 camera connector[11] of the STM32MP135x-DK Discovery kit More info green.png. DCMIPP hardware block interconnects with the OV5640 camera sensor through the MIPID02 CSI-2 to parallel bridge of STM32MP135x-DK Discovery kit More info green.png.

Refer to the OV5640 bindings [6] and the MIPID02 bridge bindings [12] for more details.

Documentation on various V4L2 camera sensors can be found inside I2C media bindings folder[13]. Refer to the dedicated sensor binding documentation to adapt your board device tree file to this dedicated sensor.

4. How to configure the DT using STM32CubeMX[edit source]

The STM32CubeMX tool can be used to configure the STM32MPU device and get the corresponding platform configuration device tree files.
The STM32CubeMX may not support all the properties described in the above DT bindings documentation paragraph. If so, the tool inserts user sections in the generated device tree. These sections can then be edited to add some properties and they are preserved from one generation to another. Refer to STM32CubeMX user manual for further information.

5. References[edit source]

Please refer to the following links for additional information: