Difference between revisions of "USART internal peripheral"

[quality revision] [quality revision]
m (How to go further)
m
 
Applicable for STM32MP13x lines, STM32MP15x lines

1 Article purpose[edit]

The purpose of this article is to:

  • briefly introduce the USART peripheral and its main features
  • indicate the level of security supported by this hardware block
  • explain how each instance can be allocated to the runtime contexts and linked to the corresponding software components
  • explain, when needed, how to configure the USART peripheral.

2 Peripheral overview[edit]

The USART peripheral is used to interconnect STM32 MPU devices with other systems, typically via RS232 or RS485 protocols. In addition, the USART can be used for smartcard interfacing or SPI master/slave operation and supports the Synchronous mode.

The UART peripheral is similar to the USART, but does not support the Synchronous mode nor the smartcard interfacing.

High-speed data communications can be achieved by using the DMA internal peripheral for multibuffer configuration.

2.1 Features[edit]

Refer to STM32MP13 reference manuals or STM32MP15 reference manuals for the complete list of features, and to the software components, introduced below, to see which features are implemented.

2.2 Security support[edit]

2.2.1 On STM32MP13x lines Warning.png[edit]

USART1 and USART2 are a secure instances (under ETZPC control).
The other UARTs and USARTs are non-secure instances.

2.2.2 On STM32MP15x lines More info.png[edit]

USART1 is a secure instance (under ETZPC control).
The other UARTs and USARTs are non-secure instances.

3 Peripheral usage and associated software[edit]

3.1 Boot time[edit]

All USART and UART instances that are not securable via ETZPC (see #Security support) are boot devices that support serial boot for Flash programming with STM32CubeProgrammer.

3.2 Runtime[edit]

3.2.1 Overview[edit]

The STM32 MPU devices feature four USART instances (supporting both Asynchronous and Synchronous modes), and four UART instances (supporting only Asynchronous mode).

Secure USART can be allocated to:

  • the Arm® Cortex®-A7 secure core to be used under OP-TEE with the USART OP-TEE driver, typically to communicate with a smartcard.


All USART and UART instances can be allocated to:

  • the Arm® Cortex®-A7 non-secure core to be used under Linux® with the tty framework. However, the Linux® kernel supports only the UART Asynchronous mode (Synchronous mode not supported).

or, on STM32MP15x lines More info.png only,

  • the Arm® Cortex®-M4 to be used with STM32Cube MPU Package with USART HAL driver. Both USART Synchronous and Asynchronous modes are supported by the STM32Cube MPU Package.


Chapter Peripheral assignment describes which peripheral instance can be assigned to which context.

3.2.2 Software frameworks[edit]

3.2.2.1 On STM32MP13x lines Warning.png[edit]
Domain Peripheral Software components Comment
OP-TEE Linux
Low speed interface USART USART OP-TEE driver Linux serial/tty framework
3.2.2.2 On STM32MP15x lines More info.png[edit]

Internal peripherals software table template

| Low speed interface | USART | USART OP-TEE driver | Linux serial/tty framework | STM32Cube USART driver | |- |}
Domain Peripheral Software components Comment
OP-TEE Linux STM32Cube
Low speed interface USART USART OP-TEE driver Linux serial/tty framework STM32Cube USART driver

3.2.3 Peripheral configuration[edit]

The configuration is applied by the firmware running in the context to which the peripheral is assigned. The configuration can be done alone via the STM32CubeMX tool for all internal peripherals, and then manually completed (particularly for external peripherals) according to the information given in the corresponding software framework article or, for Linux in the Serial TTY device tree configuration article.

3.2.4 Peripheral assignment[edit]

3.2.4.1 On STM32MP13x lines Warning.png[edit]

Click on the right to expand the legend...

STM32MP13IPsOverview.png

Check boxes illustrate the possible peripheral allocations supported by STM32 MPU Embedded Software:

  • means that the peripheral can be assigned () to the given runtime context.
  • means that the peripheral can be assigned to the given runtime context, but this configuration is not supported in STM32 MPU Embedded Software distribution.
  • is used for system peripherals that cannot be unchecked because they are statically connected in the device.

Refer to How to assign an internal peripheral to a runtime context for more information on how to assign peripherals manually or via STM32CubeMX.
The present chapter describes STMicroelectronics recommendations or choice of implementation. Additional possiblities might be described in STM32MP13 reference manuals.

Domain Peripheral Runtime allocation Comment
Instance Cortex-A7
secure
(OP-TEE)
Cortex-A7
non-secure
(Linux)
Low speed interface USART USART1 Assignment (single choice)
USART2 Assignment (single choice)
USART3
UART4
UART5
USART6
UART7
UART8
3.2.4.2 On STM32MP15x lines More info.png[edit]
Internal peripherals assignment table template
| rowspan="8" | Low speed interface
| rowspan="8" | USART
| USART1
| 
| 
|
| Assignment (single choice)
|-
| USART2
| 
| 
| 
| Assignment (single choice)
|-
| USART3
| 
| 
| 
| Assignment (single choice)
|-
| UART4
| 
| 
| 
| Assignment (single choice). 

Used for Linux® serial console on ST boards. |- | UART5 | | | | Assignment (single choice) |- | USART6 | | | | Assignment (single choice) |- | UART7 | | | | Assignment (single choice) |- | UART8 | | | | Assignment (single choice) |-
|}

Click on the right to expand the legend...

STM32MP15 internal peripherals

Check boxes illustrate the possible peripheral allocations supported by STM32 MPU Embedded Software:

  • means that the peripheral can be assigned () to the given runtime context.
  • means that the peripheral can be assigned to the given runtime context, but this configuration is not supported in STM32 MPU Embedded Software distribution.
  • is used for system peripherals that cannot be unchecked because they are statically connected in the device.

Refer to How to assign an internal peripheral to a runtime context for more information on how to assign peripherals manually or via STM32CubeMX.
The present chapter describes STMicroelectronics recommendations or choice of implementation. Additional possiblities might be described in STM32MP15 reference manuals.

Domain Peripheral Runtime allocation Comment
Instance Cortex-A7
secure
(OP-TEE)
Cortex-A7
non-secure
(Linux)
Cortex-M4

(STM32Cube)
Low speed interface USART USART1 Assignment (single choice)
USART2 Assignment (single choice)
USART3 Assignment (single choice)
UART4 Assignment (single choice).
Used for Linux® serial console on ST boards.
UART5 Assignment (single choice)
USART6 Assignment (single choice)
UART7 Assignment (single choice)
UART8 Assignment (single choice)

4 How to go further[edit]

Additional documentation on USART peripheral is available on st.com:

  • STM32 USART training [1] presents the STM32 Universal Synchronous/Asynchronous Receiver/Transmitter interface.
  • STM32 USART automatic baud rate detection [2] presents STM32 USART automatic baud rate detection.

5 References[edit]

  1. Please refer to STM32MP1-Peripheral-USART document on st.com
  2. STM32 USART automatic baud rate detection application note (AN4908)



<noinclude>{{ApplicableFor
|MPUs list=STM32MP13x, STM32MP15x
|MPUs checklist=STM32MP13x,STM32MP15x
}}</noinclude>

==Article purpose==
The purpose of this article is to:
* briefly introduce the USART peripheral and its main features
* indicate the level of security supported by this hardware block
* explain how each instance can be allocated to the runtime contexts and linked to the corresponding software components
* explain, when needed, how to configure the USART peripheral.

==Peripheral overview==
The '''USART''' peripheral is used to interconnect STM32 MPU devices with other systems, typically via RS232 or RS485 protocols. In addition, the USART can be used for smartcard interfacing or SPI master/slave operation and supports the '''Synchronous''' mode.

The '''UART''' peripheral is similar to the USART, but does not support the Synchronous mode nor the smartcard interfacing. 

High-speed data communications can be achieved by using the [[DMA internal peripheral]] for multibuffer configuration.

===Features===
Refer to [[STM32MP13 resources#Reference manuals|STM32MP13 reference manuals]] or [[STM32MP15 resources#Reference manuals|STM32MP15 reference manuals]] for the complete list of features, and to the software components, introduced below, to see which features are implemented.

===Security support===
==== On {{MicroprocessorDevice | device=13}} ====
USART1 and USART2 are  a '''secure''' instances (under [[ETZPC_internal_peripheral|ETZPC]] control).<br>

The other UARTs and USARTs are '''non-secure''' instances.
==== On {{MicroprocessorDevice | device=15}} ====
USART1 is  a '''secure''' instance (under [[ETZPC_internal_peripheral|ETZPC]] control).<br>

The other UARTs and USARTs are '''non-secure''' instances.

==Peripheral usage and associated software==
===Boot time===
All USART and UART instances that are not securable via ETZPC (see [[#Security support]]) are boot devices that support serial boot for Flash programming with [[STM32CubeProgrammer]].

===Runtime===
====Overview====

The STM32 MPU devices feature four USART instances (supporting both Asynchronous and Synchronous modes), and four UART instances (supporting only Asynchronous mode).

Secure USART can be allocated to:
* the Arm<sup>&reg;</sup> Cortex<sup>&reg;</sup>-A7 secure core to be used under OP-TEE with the [[OP-TEE_overview|USART OP-TEE driver]], typically to communicate with a smartcard.<br/>

All USART and UART instances can be allocated to:
* the Arm<sup>&reg;</sup> Cortex<sup>&reg;</sup>-A7 non-secure core to be used under Linux<sup>&reg;</sup> with the [[Serial TTY_overview|tty framework]]. However, the Linux<sup>&reg;</sup> kernel supports only the UART Asynchronous mode (Synchronous mode not supported).
or, on {{MicroprocessorDevice | device=15}} only,
* the Arm<sup>&reg;</sup> Cortex<sup>&reg;</sup>-M4 to be used with STM32Cube MPU Package with [[STM32CubeMP1 architecture|USART HAL driver]]. Both USART Synchronous and Asynchronous modes are supported by the STM32Cube MPU Package.

{{InternalInfo| On STM32MP15, from a hardware point of view, USART1 can be configured as a non-secure peripheral in the ETZPC. However:
* It remains secure from RCC standpoint. This means that secure services are required to control it from Arm<sup>&reg;</sup> Cortex<sup>&reg;</sup>-A7 non-secure core, which is not possible from Arm<sup>&reg;</sup> Cortex<sup>&reg;</sup>-M4 side. The clock control from non-secure world is possible starting from STM32MP15 Rev.B. However the reset control remains secure.
* The MDMA controller must be used with this instance whereas all other USART and UART instances are controlled via DMA1 or DMA2. For simplicity purposes, only the MDMA is shared between the Arm<sup>&reg;</sup>Cortex<sup>&reg;</sup>-A7 secure and the Arm<sup>&reg;</sup>Cortex<sup>&reg;</sup>-A7 non secure contexts.}}
Chapter [[#Peripheral assignment|Peripheral assignment]] describes which peripheral instance can be assigned to which context.

====Software frameworks====
===== On {{MicroprocessorDevice | device=13}} =====
{{:STM32MP13 internal peripherals software table template}}
 | Low speed interface
 | [[USART_internal_peripheral|USART]]
 | [[OP-TEE_overview|USART OP-TEE driver]]
 | [[Serial TTY_overview|Linux serial/tty framework]]
 |
 |-
 |}
===== On {{MicroprocessorDevice | device=15}} =====
{{:Internal_STM32MP15_internal_peripherals_software_table_template}}
 | Low speed interface
 | [[USART_internal_peripheral|USART]]
 | [[OP-TEE_overview|USART OP-TEE driver]]
 | [[Serial TTY_overview|Linux serial/tty framework]]
 | [[STM32CubeMP1 architecture|STM32Cube USART driver]]
 |
 |-
 |}

====Peripheral configuration====
The configuration is applied by the firmware running in the context to which the peripheral is assigned. The configuration can be done alone via the [[STM32CubeMX]] tool for all internal peripherals, and then manually completed (particularly for external peripherals) according to the information given in the corresponding software framework article or, for Linux in the [[Serial TTY device tree configuration]] article.

====Peripheral assignment====
===== On {{MicroprocessorDevice | device=13}} =====
{{:STM32MP13_internal_peripherals_assignment_table_template}}<section begin=stm32mp13 />

 | rowspan="8" | Low speed interface
 | rowspan="8" | [[USART_internal_peripheral|USART]]
 | USART1
 | <span title="assignable peripheral" style="font-size:21px"></span>

 | <span title="assignable peripheral" style="font-size:21px"></span>

 | Assignment (single choice)
 |-
 | USART2
 | <span title="assignable peripheral" style="font-size:21px"></span>

 | <span title="assignable peripheral" style="font-size:21px"></span>

 | Assignment (single choice)
 |-
 | USART3
 | 
 | <span title="assignable peripheral" style="font-size:21px"></span>

 |
 |-
 | UART4
 | 
 | <span title="assignable peripheral" style="font-size:21px"></span>

 |
 |-
 | UART5
 | 
 | <span title="assignable peripheral" style="font-size:21px"></span>

 |
 |-
 | USART6
 | 
 | <span title="assignable peripheral" style="font-size:21px"></span>

 |
 |-
 | UART7
 | 
 | <span title="assignable peripheral" style="font-size:21px"></span>

 |
 |-
 | UART8
 | 
 | <span title="assignable peripheral" style="font-size:21px"></span>

 |
 |-<section end=stm32mp13 />

 |}
===== On {{MicroprocessorDevice | device=15}} =====
{{:Internal_STM32MP15_internal_peripherals_assignment_table_template}}<section begin=stm32mp15 />

 | rowspan="8" | Low speed interface
 | rowspan="8" | [[USART_internal_peripheral|USART]]
 | USART1
 | <span title="assignable peripheral" style="font-size:21px"></span>

 | <span title="assignable peripheral" style="font-size:21px"></span>

 |
 | Assignment (single choice)
 |-
 | USART2
 | 
 | <span title="assignable peripheral" style="font-size:21px"></span>

 | <span title="assignable peripheral" style="font-size:21px"></span>

 | Assignment (single choice)
 |-
 | USART3
 | 
 | <span title="assignable peripheral" style="font-size:21px"></span>

 | <span title="assignable peripheral" style="font-size:21px"></span>

 | Assignment (single choice)
 |-
 | UART4
 | 
 | <span title="assignable peripheral" style="font-size:21px"></span>

 | <span title="assignable peripheral" style="font-size:21px"></span>

 | Assignment (single choice). <br />Used for Linux<sup>&reg;</sup> serial console on [[:Category:Getting_started_with_STM32MP1_boards|ST boards]].
 |-
 | UART5
 | 
 | <span title="assignable peripheral" style="font-size:21px"></span>

 | <span title="assignable peripheral" style="font-size:21px"></span>

 | Assignment (single choice)
 |-
 | USART6
 | 
 | <span title="assignable peripheral" style="font-size:21px"></span>

 | <span title="assignable peripheral" style="font-size:21px"></span>

 | Assignment (single choice)
 |-
 | UART7
 | 
 | <span title="assignable peripheral" style="font-size:21px"></span>

 | <span title="assignable peripheral" style="font-size:21px"></span>

 | Assignment (single choice)
 |-
 | UART8
 | 
 | <span title="assignable peripheral" style="font-size:21px"></span>

 | <span title="assignable peripheral" style="font-size:21px"></span>

 | Assignment (single choice)
 |-<section end=stm32mp15 />

 |}

==How to go further==
Additional documentation on USART peripheral is available on st.com:
* STM32 USART training <ref>

Please refer to '''STM32MP1-Peripheral-USART''' document on st.com </ref> presents the STM32 Universal Synchronous/Asynchronous Receiver/Transmitter interface.
* STM32 USART automatic baud rate detection <ref>[https://www.st.com/resource/en/application_note/dm00327191-stm32-usart-automatic-baud-rate-detection-stmicroelectronics.pdf STM32 USART automatic baud rate detection application  note (AN4908)]</ref> presents STM32 USART automatic baud rate detection.

==References==<references/>

<noinclude>

[[Category:Low speed interface peripherals]]
{{PublicationRequestId | 8315 | 2018-08-03 | AnneJ}}
{{ArticleBasedOnModel | Internal peripheral article model}}
{{ReviewsComments|JCT 1840: alignment needed with the last version of the model<br>

[[Category:ToBeAlignedWithModel]]
}}</noinclude>
Line 61: Line 61:
 
  |}
 
  |}
 
===== On {{MicroprocessorDevice | device=15}} =====
 
===== On {{MicroprocessorDevice | device=15}} =====
{{:Internal_peripherals_software_table_template}}
+
{{:STM32MP15_internal_peripherals_software_table_template}}
 
  | Low speed interface
 
  | Low speed interface
 
  | [[USART_internal_peripheral|USART]]
 
  | [[USART_internal_peripheral|USART]]
Line 123: Line 123:
 
  |}
 
  |}
 
===== On {{MicroprocessorDevice | device=15}} =====
 
===== On {{MicroprocessorDevice | device=15}} =====
{{:Internal_peripherals_assignment_table_template}}
+
{{:STM32MP15_internal_peripherals_assignment_table_template}}
 
<section begin=stm32mp15 />
 
<section begin=stm32mp15 />
 
  | rowspan="8" | Low speed interface
 
  | rowspan="8" | Low speed interface