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{{ApplicableFor
{{ApplicableFor
|MPUs list=STM32MP13x, STM32MP15x
|MPUs list=STM32MP13x, STM32MP15x, STM32MP21x, STM32MP23x, STM32MP25x
|MPUs checklist=STM32MP13x, STM32MP15x
|MPUs checklist=STM32MP13x, STM32MP15x, STM32MP21x, STM32MP23x, STM32MP25x
}}
}}
==Article purpose==
==Article purpose==
The purpose of this article is to:
The purpose of this article is to:
* briefly introduce the LTDC peripheral and its main features
* briefly introduce the LTDC peripheral and its main features,
* indicate the level of security supported by this hardware block
* indicate the peripheral instances assignment at boot time and their assignment at runtime (including whether instances can be allocated to secure contexts),
* explain how each instance can be allocated to the runtime contexts and linked to the corresponding software components
* list the software frameworks and drivers managing the peripheral,
* explain, when necessary, how to configure the LTDC peripheral.
* explain how to configure the peripheral.


==Peripheral overview==
==Peripheral overview==
The '''L'''CD-'''T'''FT (Liquid Crystal Display - Thin Film Transistor) '''D'''isplay '''C'''ontroller peripheral ('''LTDC''') is used to provide an interface to a variety of parallel digital RGB LCD and TFT display panels. The LTDC generates the parallel digital RGB (Red, Green, Blue) signals and the related control signals (horizontal and vertical synchronizations, Pixel Clock and Data Enable).<br>
The '''L'''CD-'''T'''FT (Liquid Crystal Display - Thin Film Transistor) '''D'''isplay '''C'''ontroller peripheral ('''LTDC''') is used to provide an interface to a variety of parallel digital RGB LCD and TFT display panels. The LTDC generates the parallel digital RGB (Red, Green, Blue) signals and the related control signals (horizontal and vertical synchronizations, Pixel Clock and Data Enable).
Moreover, on {{MicroprocessorDevice | device=15}}, the LTDC is connected to the [[DSI internal peripheral]] that provides an interface to communicate with MIPI<sup>&reg;</sup> DSI-compliant display panels.


===Features===
Refer to the [[STM32 MPU resources#Reference manuals|STM32 MPU reference manuals]] for the complete list of features.
Refer to the [[STM32MP13 resources#Reference manuals|STM32MP13 reference manuals]] or [[STM32MP15 resources#Reference manuals|STM32MP15 reference manuals]] for the complete list of features, and to the software components, introduced below, to see which features are implemented.


===Security support===
=== On {{MicroprocessorDevice | device=15}} ===
==== On {{MicroprocessorDevice | device=13}} ====
The LTDC peripheral:
The LTDC layer2 can be set as '''secure''' (under [[ETZPC_internal_peripheral|ETZPC]] control), whereas the layer1 is always '''non-secure'''.<br>
* main features are:
==== On {{MicroprocessorDevice | device=15}} ====
** 2 display layers
The LTDC is a '''non-secure''' peripheral.
** 24-bit RGB parallel pixel output; 8 bits-per-pixel (RGB888)
** Programmable timings for different display panels
** Programmable polarity for HSYNC, VSYNC and data enable
** Color look-up table (CLUT) up to 256 color (256x24-bit) per layer
** Up to 8 input color formats selectable per layer: ARGB8888, RGB888, RGB565, ARGB1555, ARGB4444, L8 (8-bit luminance or CLUT), AL44 (4-bit alpha + 4-bit luminance), AL88 (8-bit alpha + 8-bit luminance)
** Pseudo-random dithering output for low bits per channel: Dither width 2 bits for red, green, blue
** Flexible blending between two layers using alpha value (per pixel or constant)
** Programmable background color
** Color keying (transparency color)
** Programmable window position and size
* is also connected to the [[DSI internal peripheral]] that provides an interface to communicate with MIPI<sup>&reg;</sup> DSI-compliant display panels
* is a '''non-secure''' peripheral


==Peripheral usage and associated software==
=== On {{MicroprocessorDevice | device=13}} ===
===Boot time===
The LTDC peripheral:
* main features are the same as on {{MicroprocessorDevice | device=15}}, with the following extra ones:
** Multiple input pixel formats:
*** Predefined ARGB, with 7 formats: ARGB8888, ABGR8888, RGBA8888, BGRA8888, RGB565, BGR565, RGB888packed
*** Flexible ARGB, allowing any width and location for A,R,G,B components
*** Predefined YUV, with 3 formats: YUV422-1L (FourCC: YUYV, Interleaved), YUV420-2L (FourCC: NV12, semi planar), YUV420-3L (FourCC: Yxx, full planar) with some flexibility on the sequence of the component
** Blending with flexible layer order and alpha value (per pixel or constant)
** Gamma with non-linear configurable table
** Output as RGB888 24 bpp or YUV422 16 bpp (interleaved)
** Horizontal and vertical mirrors on layers (allowing 180 degree rotation)
* the LTDC layer2 can be set as '''secure''' (under [[ETZPC_internal_peripheral|ETZPC]] control), whereas the layer1 is always '''non-secure'''
 
=== On {{MicroprocessorDevice | device=21}} ===
The LTDC peripheral:
* main features are the same as on {{MicroprocessorDevice | device=13}}, with the following extra ones:
** 3 input layers blended together to compose the display
** Upscaler (horizontal and vertical) with bilinear filtering, up to 8x8 with decimal ratios
** Secure layer (using layer3) capability, with grouped regs and additional interrupt set
* the LTDC layer3 can be set as '''secure''' (under [[RIFSC internal peripheral]] control), whereas layer1 and layer2 are always '''non-secure'''.
** The RISUP differentiates the access right of accesses performed toward the following RIF protected peripheral ID:
*** "LTDC_CMN": LTDC common registers, about panel info, synchronization, interface
*** "LTDC_L1L2" (layer 1 and 2): for the window of any two default applications
*** "LTDC_L3": LTDC layer 3, for the window of a potentially secure application, or any default application if there is no secure layer
** The RIMU differentiates the bus transactions emitted by the following AXI masters:
*** "RIMU_L1L2": read access only for layer 1 and 2, always non-protected
*** "RIMU_L3": read access only for layer 3, potentially protected
 
=== On {{MicroprocessorDevice | device=23}} and {{MicroprocessorDevice | device=25}} ===
The LTDC peripheral:
* main features are the same as on {{MicroprocessorDevice | device=21}}, with the following extra ones:
** Rotation of the composition output allowing 90 ,180 or 270 degrees
* the LTDC layer3 can be set as '''secure''' (under [[RIFSC internal peripheral]] control), whereas layer1 and layer2 are always '''non-secure'''.
** The RISUP differentiates the access right of accesses performed toward the following RIF protected peripheral ID:
*** "LTDC_CMN": LTDC common registers, about panel info, synchronization, interface
*** "LTDC_L1L2" (layer 1 and 2): for the window of any two default applications
*** "LTDC_L3": LTDC layer 3, for the window of a potentially secure application, or any default application if there is no secure layer
*** "LTDC_ROT": LTDC rotation, with information about the rotation buffers
** The RIMU differentiates the bus transactions emitted by the following AXI masters:
*** "RIMU_L1L2": read access only for layer 1 and 2, always non-protected
*** "RIMU_L3": read access only for layer 3, potentially protected
*** "RIMU_ROT": write of blended pixels, and read of to-be-rotated pixels, potentially protected, because containing blended pixels of the protected layer 3
* is also connected to
** the [[DSI internal peripheral]] that provides an interface to communicate with MIPI<sup>&reg;</sup> DSI-compliant display panels
** the [[LVDS internal peripheral]] that provides an interface to communicate with FPD-Link I and OpenLDI LVDS display panels
 
==Peripheral usage==
This chapter is applicable in the scope of the '''OpenSTLinux BSP''' running on the Arm<sup>&reg;</sup> Cortex<sup>&reg;</sup>-A processor(s), and the '''FwST-M Package''' running on the Arm<sup>&reg;</sup> Cortex<sup>&reg;</sup>-M processor.
 
===Boot time assignment===
====On {{MicroprocessorDevice | device=1}}====
The LTDC is used at boot time for displaying a splash screen thanks to the U-Boot framework <ref>[[U-Boot overview | U-Boot framework]]</ref>.
The LTDC is used at boot time for displaying a splash screen thanks to the U-Boot framework <ref>[[U-Boot overview | U-Boot framework]]</ref>.
{{#lst:STM32MP1_internal_peripherals_assignment_table_template|stm32mp1_boottime}}
<section begin=stm32mp13_boottime /><section begin=stm32mp15_boottime />
| rowspan="1" | Visual
| rowspan="1" | [[LTDC internal peripheral|LTDC]]
| LTDC
|
|
| <span title="assignable peripheral" style="font-size:21px">☐</span>
|
|-
<section end=stm32mp13_boottime /><section end=stm32mp15_boottime />
|}


===Runtime===
====On {{MicroprocessorDevice | device=21}}====
====Overview====
=====For {{TrustedDomainFlavor|flavor=A35-TD}}=====
The LTDC internal peripheral is allocated to the Arm<sup>&reg;</sup> Cortex<sup>&reg;</sup>-A7 non-secure core to be controlled in Linux<sup>&reg;</sup> by the Linux [[DRM KMS overview | DRM/KMS framework]].
{{#lst:STM32MP2_internal_peripherals_assignment_table_template|stm32mp2_a35_boottime}}
<section begin=stm32mp21_a35_boottime />
| rowspan="3" | Visual
| rowspan="3" | [[LTDC internal peripheral | LTDC]]
| LTDC_CMN
|
|
| <span title="assignable peripheral" style="font-size:21px">☐</span>
|
|-
| LTDC_L1L2
|
|
| <span title="assignable peripheral" style="font-size:21px">☐</span>
|
|-
| LTDC_L3
|
|
| <span title="assignable peripheral" style="font-size:21px">⬚</span>
|
|-
<section end=stm32mp21_a35_boottime />
|}


On {{MicroprocessorDevice | device=13}}, the LTDC can be set secure from ETZPC : this is done at runtime when [[OP-TEE overview | OP-TEE]] trusted user interface (Trusted UI) is launched in order to switch the LTDC control and the input layer2 as secure, to display a secure content that cannot be seen from the non-secure world.  
=====For {{TrustedDomainFlavor|flavor=M33-TD}}=====
{{ReviewsComments|-- [[User:Philippe Cornu|Philippe Cornu]] ([[User talk:Philippe Cornu|talk]]) 17:40, 6 June 2025 (CEST)<br />In the future, we should add the possibility to have a M33-based splashscreen and to remove the U-Boot splashscreen.}}
{{#lst:STM32MP2_internal_peripherals_assignment_table_template|stm32mp2_m33_boottime}}
<section begin=stm32mp21_m33_boottime />
| rowspan="3" | Visual
| rowspan="3" | [[LTDC internal peripheral | LTDC]]
| LTDC_CMN
|
|
| <span title="assignable peripheral" style="font-size:21px">☐</span>
|
|
|-
| LTDC_L1L2
|
|
| <span title="assignable peripheral" style="font-size:21px">☐</span>
|
|
|-
| LTDC_L3
|
|
| <span title="assignable peripheral" style="font-size:21px">⬚</span>
|
|
|-
<section end=stm32mp21_m33_boottime />
|}


Chapter [[#Peripheral assignment|Peripheral assignment]] describes which peripheral instance can be assigned to which context.
====On {{MicroprocessorDevice | device=23}} and {{MicroprocessorDevice | device=25}}====
=====For {{TrustedDomainFlavor|flavor=A35-TD}}=====
{{#lst:STM32MP2_internal_peripherals_assignment_table_template|stm32mp2_a35_boottime}}
<section begin=stm32mp23_a35_boottime />
<section begin=stm32mp25_a35_boottime />
| rowspan="4" | Visual
| rowspan="4" | [[LTDC internal peripheral | LTDC]]
| LTDC_CMN
|
|
| <span title="assignable peripheral" style="font-size:21px">☐</span>
|
|-
| LTDC_L1L2
|
|
| <span title="assignable peripheral" style="font-size:21px">☐</span>
|
|-
| LTDC_L3
|
|
| <span title="assignable peripheral" style="font-size:21px">⬚</span>
|
|-
| LTDC_ROT
|
|
| <span title="assignable peripheral" style="font-size:21px">⬚</span>
|
|-
<section end=stm32mp25_a35_boottime />
<section end=stm32mp23_a35_boottime />
|}


====Software frameworks====
=====For {{TrustedDomainFlavor|flavor=M33-TD}}=====
===== On {{MicroprocessorDevice | device=13}} =====
{{ReviewsComments|-- [[User:Philippe Cornu|Philippe Cornu]] ([[User talk:Philippe Cornu|talk]]) 17:40, 6 June 2025 (CEST)<br />In the future, we should add the possibility to have a M33-based splashscreen and to remove the U-Boot splashscreen.}}
{{:STM32MP13 internal peripherals software table template}}
{{#lst:STM32MP2_internal_peripherals_assignment_table_template|stm32mp2_m33_boottime}}
| Visual
<section begin=stm32mp23_m33_boottime />
| [[LTDC internal peripheral|LTDC]]
<section begin=stm32mp25_m33_boottime />
| [[OP-TEE overview | OP-TEE Trusted UI]]
| rowspan="4" | Visual
| [[DRM KMS overview | DRM/KMS framework]]
| rowspan="4" | [[LTDC internal peripheral | LTDC]]
|
| LTDC_CMN
|-
|  
|}
|  
===== On {{MicroprocessorDevice | device=15}} =====
| <span title="assignable peripheral" style="font-size:21px">☐</span>
{{:Internal_peripherals_software_table_template}}
|
| Visual
|  
| [[LTDC internal peripheral|LTDC]]
|-
|  
| LTDC_L1L2
| [[DRM KMS overview | DRM/KMS framework]]
|
|  
|
|
| <span title="assignable peripheral" style="font-size:21px">☐</span>
|-
|
|}
|  
====Peripheral configuration====
|-
The configuration is applied by the firmware running in the context to which the peripheral is assigned. The configuration can be done alone via the [[STM32CubeMX]] tool for all internal peripherals, and then manually completed (particularly for external peripherals), according to the information given in the corresponding software framework article or in the [[LTDC device tree configuration]] article for Linux<sup>&reg;</sup>.
| LTDC_L3
|  
|  
| <span title="assignable peripheral" style="font-size:21px">⬚</span>
|  
|  
|-
| LTDC_ROT
|
|
| <span title="assignable peripheral" style="font-size:21px">⬚</span>
|
|
|-
<section end=stm32mp25_m33_boottime />
<section end=stm32mp23_m33_boottime />
|}


====Peripheral assignment====
===Runtime assignment===
===== On {{MicroprocessorDevice | device=13}} =====
====On {{MicroprocessorDevice | device=13}}====
{{:STM32MP13_internal_peripherals_assignment_table_template}}
{{#lst:STM32MP1_internal_peripherals_assignment_table_template|stm32mp13_runtime}}
<section begin=stm32mp13 />
<section begin=stm32mp13_runtime />
| rowspan="1" | Visual
| rowspan="1" | Visual
| rowspan="1" | [[LTDC internal peripheral|LTDC]]
| rowspan="1" | [[LTDC internal peripheral|LTDC]]
| LTDC
| LTDC
| <span title="assignable peripheral" style="font-size:21px">☐</span>
| <span title="assignable peripheral" style="font-size:21px">☐</span>
| <span title="assignable peripheral" style="font-size:21px">☐</span>
| <span title="assignable peripheral" style="font-size:21px">☐</span>
| Shareable (multiple choices supported)
| Shareable (multiple choices supported)
|-
|-
<section end=stm32mp13 />
<section end=stm32mp13_runtime />
|}
|}
===== On {{MicroprocessorDevice | device=15}} =====
{{:Internal_peripherals_assignment_table_template}}
<section begin=stm32mp15 />
| rowspan="1" | Visual
| rowspan="1" | [[LTDC internal peripheral|LTDC]]
| LTDC
|
| <span title="assignable peripheral" style="font-size:21px">☐</span>
|
|
|-
<section end=stm32mp15 />
|}


==How to go further==
====On {{MicroprocessorDevice | device=15}}====
{{#lst:STM32MP1_internal_peripherals_assignment_table_template|stm32mp15_runtime}}
<section begin=stm32mp15_runtime />
| rowspan="1" | Visual
| rowspan="1" | [[LTDC internal peripheral|LTDC]]
| LTDC
|
| <span title="assignable peripheral" style="font-size:21px">☐</span>
|
|
|-
<section end=stm32mp15_runtime />
|}
 
====On {{MicroprocessorDevice | device=21}}====
The table below is applicable to any {{TrustedDomainFlavor | flavor=Any-TD}}.
{{#lst:STM32MP2_internal_peripherals_assignment_table_template|stm32mp21_runtime}}
<section begin=stm32mp21_m33_runtime />
<section begin=stm32mp21_a35_runtime />
| rowspan="3" | Visual
| rowspan="3" | [[LTDC internal peripheral | LTDC]]
| LTDC_CMN
| <span title="assignable peripheral but not supported" style="font-size:21px">⬚</span><sup>OP-TEE</sup>
| <span title="assignable peripheral" style="font-size:21px">☐</span>
| <span title="assignable peripheral but not supported" style="font-size:21px">⬚</span>
| <span title="assignable peripheral" style="font-size:21px">☐</span>
|
|-
| LTDC_L1L2
| <span title="assignable peripheral but not supported" style="font-size:21px">⬚</span><sup>OP-TEE</sup>
| <span title="assignable peripheral" style="font-size:21px">☐</span>
| <span title="assignable peripheral but not supported" style="font-size:21px">⬚</span>
| <span title="assignable peripheral" style="font-size:21px">☐</span>
|
|-
| LTDC_L3
| <span title="assignable peripheral" style="font-size:21px">☐</span><sup>OP-TEE</sup>
| <span title="assignable peripheral" style="font-size:21px">☐</span>
| <span title="assignable peripheral but not supported" style="font-size:21px">⬚</span>
| <span title="assignable peripheral" style="font-size:21px">☐</span>
|
|-
<section end=stm32mp21_a35_runtime />
<section end=stm32mp21_m33_runtime />
|}
 
====On {{MicroprocessorDevice | device=23}}====
The table below is applicable to any {{TrustedDomainFlavor | flavor=Any-TD}}.
{{#lst:STM32MP2_internal_peripherals_assignment_table_template|stm32mp23_runtime}}
<section begin=stm32mp23_m33_runtime />
<section begin=stm32mp23_a35_runtime />
| rowspan="4" | Visual
| rowspan="4" | [[LTDC internal peripheral | LTDC]]
| LTDC_CMN
| <span title="assignable peripheral but not supported" style="font-size:21px">⬚</span><sup>OP-TEE</sup>
| <span title="assignable peripheral" style="font-size:21px">☐</span>
| <span title="assignable peripheral but not supported" style="font-size:21px">⬚</span>
| <span title="assignable peripheral" style="font-size:21px">☐</span>
|
|-
| LTDC_L1L2
| <span title="assignable peripheral but not supported" style="font-size:21px">⬚</span><sup>OP-TEE</sup>
| <span title="assignable peripheral" style="font-size:21px">☐</span>
| <span title="assignable peripheral but not supported" style="font-size:21px">⬚</span>
| <span title="assignable peripheral" style="font-size:21px">☐</span>
|
|-
| LTDC_L3
| <span title="assignable peripheral" style="font-size:21px">☐</span><sup>OP-TEE</sup>
| <span title="assignable peripheral" style="font-size:21px">☐</span>
| <span title="assignable peripheral but not supported" style="font-size:21px">⬚</span>
| <span title="assignable peripheral" style="font-size:21px">☐</span>
|
|-
| LTDC_ROT
| <span title="assignable peripheral but not supported" style="font-size:21px">⬚</span><sup>OP-TEE</sup>
| <span title="assignable peripheral" style="font-size:21px">☐</span>
| <span title="assignable peripheral but not supported" style="font-size:21px">⬚</span>
| <span title="assignable peripheral" style="font-size:21px">☐</span>
|
|-
<section end=stm32mp23_a35_runtime />
<section end=stm32mp23_m33_runtime />
|}
 
====On {{MicroprocessorDevice | device=25}}====
The table below is applicable to any {{TrustedDomainFlavor | flavor=Any-TD}}.
{{#lst:STM32MP2_internal_peripherals_assignment_table_template|stm32mp25_runtime}}
<section begin=stm32mp25_m33_runtime />
<section begin=stm32mp25_a35_runtime />
| rowspan="4" | Visual
| rowspan="4" | [[LTDC internal peripheral | LTDC]]
| LTDC_CMN
| <span title="assignable peripheral but not supported" style="font-size:21px">⬚</span><sup>OP-TEE</sup>
| <span title="assignable peripheral" style="font-size:21px">☐</span>
| <span title="assignable peripheral but not supported" style="font-size:21px">⬚</span>
| <span title="assignable peripheral" style="font-size:21px">☐</span>
|
|
|-
| LTDC_L1L2
| <span title="assignable peripheral but not supported" style="font-size:21px">⬚</span><sup>OP-TEE</sup>
| <span title="assignable peripheral" style="font-size:21px">☐</span>
| <span title="assignable peripheral but not supported" style="font-size:21px">⬚</span>
| <span title="assignable peripheral" style="font-size:21px">☐</span>
|
|
|-
| LTDC_L3
| <span title="assignable peripheral" style="font-size:21px">☐</span><sup>OP-TEE</sup>
| <span title="assignable peripheral" style="font-size:21px">☐</span>
| <span title="assignable peripheral but not supported" style="font-size:21px">⬚</span>
| <span title="assignable peripheral" style="font-size:21px">☐</span>
|
|
|-
| LTDC_ROT
| <span title="assignable peripheral but not supported" style="font-size:21px">⬚</span><sup>OP-TEE</sup>
| <span title="assignable peripheral" style="font-size:21px">☐</span>
| <span title="assignable peripheral but not supported" style="font-size:21px">⬚</span>
| <span title="assignable peripheral" style="font-size:21px">☐</span>
|
|
|-
<section end=stm32mp25_a35_runtime />
<section end=stm32mp25_m33_runtime />
|}
 
==Software frameworks and drivers==
Below are listed the software frameworks and drivers managing the LTDC peripheral for the embedded software components listed in the above tables.
 
* '''Linux<sup>&reg;</sup>''':
** [[DRM KMS overview | DRM/KMS framework]]
** Linux kernel: {{CodeSource | Linux kernel | drivers/gpu/drm/stm/ltdc.c}}
* '''OP-TEE''': [[STM32 MPU OP-TEE overview | OP-TEE framework (for the trusted UI)]]
** On {{MicroprocessorDevice | device=13}}, the LTDC can be set secure thanks to the [[ETZPC internal peripheral]] : this is done at runtime when [[STM32 MPU OP-TEE overview | OP-TEE]] trusted user interface (Trusted UI) is launched in order to switch the LTDC control and the LTDC input layer2 as secure, to display a secure content that cannot be modified from the non-secure world.
** On {{MicroprocessorDevice | device=2}}, the LTDC can be set secure thanks to the [[RIFSC internal peripheral]] : this is done at runtime when [[STM32 MPU OP-TEE overview | OP-TEE]] trusted user interface (Trusted UI) is launched in order to switch the LTDC control and the LTDC input layer3 as secure, to display a secure content that cannot be modified from the non-secure world.
** {{CodeSource | OP-TEE_OS | core/drivers/stm32_ltdc.c}} (ltdc driver)
* '''U-Boot''':
** [[U-Boot overview | U-Boot framework (for the display splash screen)]]
** {{CodeSource | U-Boot | drivers/video/stm32/stm32_ltdc.c}}
* '''STM32Cube''':
** On {{MicroprocessorDevice | device=13}}:
*** [[STM32CubeMP13 Package | LTDC HAL driver]]
*** {{CodeSource | STM32CubeMP13 | Drivers/STM32MP13xx_HAL_Driver/Inc/stm32mp13xx_hal_ltdc.h | header file of LTDC HAL module}}
** On {{MicroprocessorDevice | device=2}}:
*** [[STM32CubeMP2 Package | LTDC HAL driver]]
*** {{CodeSource | STM32CubeMP2 | Drivers/STM32MP2xx_HAL_Driver/Inc/stm32mp2xx_hal_ltdc.h | header file of LTDC HAL module}}
 
==How to assign and configure the peripheral==
The peripheral assignment can be done via the [[STM32CubeMX]] graphical tool (and manually completed if needed).<br />
This tool also helps to configure the peripheral:
* partial device trees (pin control and clock tree) generation for the OpenSTLinux software components,
* HAL initialization code generation for the STM32CubeMPU Package.
The configuration is applied by the firmware running in the context in which the peripheral is assigned.
 
See also additional information in the [[LTDC device tree configuration]] article for Linux<sup>&reg;</sup>.
 
== How to go further ==
Refer to STM32 LTDC application note (AN4861) <ref>[https://www.st.com/resource/en/application_note/dm00287603.pdf LCD-TFT display controller (LTDC) on STM32 MCUs application note (AN4861)]</ref> for a detailed description of the LTDC peripheral and applicable use-cases.
Refer to STM32 LTDC application note (AN4861) <ref>[https://www.st.com/resource/en/application_note/dm00287603.pdf LCD-TFT display controller (LTDC) on STM32 MCUs application note (AN4861)]</ref> for a detailed description of the LTDC peripheral and applicable use-cases.


Even if this application note is related to STM32 microcontrollers, it also applies to STM32 MPUs.
Even if this application note is related to STM32 microcontrollers, it also applies to STM32 MPUs.
You may be interested in the following related articles:
* [[How to use LTDC layers from CM33 and CA35 simultaneously]]
* {{#categorytree:DRM KMS}}
* {{#categorytree:OP-TEE Visual}}
* {{#categorytree:U-Boot Visual}}
=== Shared LTDC layers use cases ===
The STM32 LTDC internal peripheral can be used in various "shared" LTDC layers use cases. Please refer to following articles to go further:
* [[How to use the secure display feature]]
* [[How to use LTDC layers from CM33 and CA35 simultaneously]]


==References==
==References==
Line 94: Line 421:


<noinclude>
<noinclude>
[[Category:Visual peripherals]]
{{ArticleBasedOnModel | Internal peripheral article model}}
{{ArticleBasedOnModel | Internal peripheral article model}}
{{PublicationRequestId| 9173 | 2018-10-10 | AnneJ}}
{{PublicationRequestId| 9173 | 2018-10-10 | AnneJ}}
[[Category:Visual peripherals]]
</noinclude>
</noinclude>

Latest revision as of 14:46, 10 June 2025↑

Applicable for STM32MP13x lines, STM32MP15x lines, Unknown MPU, Unknown MPU, Unknown MPU

1. Article purpose[edit | edit source]↑

The purpose of this article is to:

  • briefly introduce the LTDC peripheral and its main features,
  • indicate the peripheral instances assignment at boot time and their assignment at runtime (including whether instances can be allocated to secure contexts),
  • list the software frameworks and drivers managing the peripheral,
  • explain how to configure the peripheral.

2. Peripheral overview[edit | edit source]↑

The LCD-TFT (Liquid Crystal Display - Thin Film Transistor) Display Controller peripheral (LTDC) is used to provide an interface to a variety of parallel digital RGB LCD and TFT display panels. The LTDC generates the parallel digital RGB (Red, Green, Blue) signals and the related control signals (horizontal and vertical synchronizations, Pixel Clock and Data Enable).

Refer to the STM32 MPU reference manuals for the complete list of features.

2.1. On STM32MP15x lines More info.png[edit | edit source]↑

The LTDC peripheral:

  • main features are:
    • 2 display layers
    • 24-bit RGB parallel pixel output; 8 bits-per-pixel (RGB888)
    • Programmable timings for different display panels
    • Programmable polarity for HSYNC, VSYNC and data enable
    • Color look-up table (CLUT) up to 256 color (256x24-bit) per layer
    • Up to 8 input color formats selectable per layer: ARGB8888, RGB888, RGB565, ARGB1555, ARGB4444, L8 (8-bit luminance or CLUT), AL44 (4-bit alpha + 4-bit luminance), AL88 (8-bit alpha + 8-bit luminance)
    • Pseudo-random dithering output for low bits per channel: Dither width 2 bits for red, green, blue
    • Flexible blending between two layers using alpha value (per pixel or constant)
    • Programmable background color
    • Color keying (transparency color)
    • Programmable window position and size
  • is also connected to the DSI internal peripheral that provides an interface to communicate with MIPI® DSI-compliant display panels
  • is a non-secure peripheral

2.2. On STM32MP13x lines More info.png[edit | edit source]↑

The LTDC peripheral:

  • main features are the same as on STM32MP15x lines More info.png, with the following extra ones:
    • Multiple input pixel formats:
      • Predefined ARGB, with 7 formats: ARGB8888, ABGR8888, RGBA8888, BGRA8888, RGB565, BGR565, RGB888packed
      • Flexible ARGB, allowing any width and location for A,R,G,B components
      • Predefined YUV, with 3 formats: YUV422-1L (FourCC: YUYV, Interleaved), YUV420-2L (FourCC: NV12, semi planar), YUV420-3L (FourCC: Yxx, full planar) with some flexibility on the sequence of the component
    • Blending with flexible layer order and alpha value (per pixel or constant)
    • Gamma with non-linear configurable table
    • Output as RGB888 24 bpp or YUV422 16 bpp (interleaved)
    • Horizontal and vertical mirrors on layers (allowing 180 degree rotation)
  • the LTDC layer2 can be set as secure (under ETZPC control), whereas the layer1 is always non-secure

2.3. On STM32MP21 unknown microprocessor device[edit | edit source]↑

The LTDC peripheral:

  • main features are the same as on STM32MP13x lines More info.png, with the following extra ones:
    • 3 input layers blended together to compose the display
    • Upscaler (horizontal and vertical) with bilinear filtering, up to 8x8 with decimal ratios
    • Secure layer (using layer3) capability, with grouped regs and additional interrupt set
  • the LTDC layer3 can be set as secure (under RIFSC internal peripheral control), whereas layer1 and layer2 are always non-secure.
    • The RISUP differentiates the access right of accesses performed toward the following RIF protected peripheral ID:
      • "LTDC_CMN": LTDC common registers, about panel info, synchronization, interface
      • "LTDC_L1L2" (layer 1 and 2): for the window of any two default applications
      • "LTDC_L3": LTDC layer 3, for the window of a potentially secure application, or any default application if there is no secure layer
    • The RIMU differentiates the bus transactions emitted by the following AXI masters:
      • "RIMU_L1L2": read access only for layer 1 and 2, always non-protected
      • "RIMU_L3": read access only for layer 3, potentially protected

2.4. On STM32MP23 unknown microprocessor device and STM32MP25 unknown microprocessor device[edit | edit source]↑

The LTDC peripheral:

  • main features are the same as on STM32MP21 unknown microprocessor device, with the following extra ones:
    • Rotation of the composition output allowing 90 ,180 or 270 degrees
  • the LTDC layer3 can be set as secure (under RIFSC internal peripheral control), whereas layer1 and layer2 are always non-secure.
    • The RISUP differentiates the access right of accesses performed toward the following RIF protected peripheral ID:
      • "LTDC_CMN": LTDC common registers, about panel info, synchronization, interface
      • "LTDC_L1L2" (layer 1 and 2): for the window of any two default applications
      • "LTDC_L3": LTDC layer 3, for the window of a potentially secure application, or any default application if there is no secure layer
      • "LTDC_ROT": LTDC rotation, with information about the rotation buffers
    • The RIMU differentiates the bus transactions emitted by the following AXI masters:
      • "RIMU_L1L2": read access only for layer 1 and 2, always non-protected
      • "RIMU_L3": read access only for layer 3, potentially protected
      • "RIMU_ROT": write of blended pixels, and read of to-be-rotated pixels, potentially protected, because containing blended pixels of the protected layer 3
  • is also connected to

3. Peripheral usage[edit | edit source]↑

This chapter is applicable in the scope of the OpenSTLinux BSP running on the Arm® Cortex®-A processor(s), and the FwST-M Package running on the Arm® Cortex®-M processor.

3.1. Boot time assignment[edit | edit source]↑

3.1.1. On STM32MP1 Series[edit | edit source]↑

The LTDC is used at boot time for displaying a splash screen thanks to the U-Boot framework [1].

Click on How to.png to expand or collapse the legend...

Domain Peripheral Boot time allocation Comment How to.png
Instance Cortex-A7
secure
(ROM code) 		Cortex-A7
secure
(TF-A BL2) 		Cortex-A7
nonsecure
(U-Boot)
Visual LTDC LTDC ☐

3.1.2. On STM32MP21 unknown microprocessor device[edit | edit source]↑

3.1.2.1. For A35-TD flavor More info green.png[edit | edit source]↑

Click on How to.png to expand or collapse the legend...

Domain Peripheral Boot time allocation Comment How to.png
Instance Cortex-A35
secure
(ROM code) 		Cortex-A35
secure
(TF-A BL2) 		Cortex-A35
nonsecure
(U-Boot)
Visual LTDC LTDC_CMN ☐
LTDC_L1L2 ☐
LTDC_L3 ⬚
3.1.2.2. For M33-TD flavor More info green.png[edit | edit source]↑


Click on How to.png to expand or collapse the legend...

Domain Peripheral Boot time allocation Comment How to.png
Instance Cortex-A35
secure
(ROM code) 		Cortex-A35
secure
(TF-A BL2) 		Cortex-A35
nonsecure
(U-Boot) 		Cortex-M33
secure
(MCUboot)
Visual LTDC LTDC_CMN ☐
LTDC_L1L2 ☐
LTDC_L3 ⬚

3.1.3. On STM32MP23 unknown microprocessor device and STM32MP25 unknown microprocessor device[edit | edit source]↑

3.1.3.1. For A35-TD flavor More info green.png[edit | edit source]↑

Click on How to.png to expand or collapse the legend...

Domain Peripheral Boot time allocation Comment How to.png
Instance Cortex-A35
secure
(ROM code) 		Cortex-A35
secure
(TF-A BL2) 		Cortex-A35
nonsecure
(U-Boot)
Visual LTDC LTDC_CMN ☐
LTDC_L1L2 ☐
LTDC_L3 ⬚
LTDC_ROT ⬚
3.1.3.2. For M33-TD flavor More info green.png[edit | edit source]↑


Click on How to.png to expand or collapse the legend...

Domain Peripheral Boot time allocation Comment How to.png
Instance Cortex-A35
secure
(ROM code) 		Cortex-A35
secure
(TF-A BL2) 		Cortex-A35
nonsecure
(U-Boot) 		Cortex-M33
secure
(MCUboot)
Visual LTDC LTDC_CMN ☐
LTDC_L1L2 ☐
LTDC_L3 ⬚
LTDC_ROT ⬚

3.2. Runtime assignment[edit | edit source]↑

3.2.1. On STM32MP13x lines More info.png[edit | edit source]↑

Click on How to.png to expand or collapse the legend...

Domain Peripheral Runtime allocation Comment How to.png
Instance Cortex-A7
secure
(OP-TEE) 		Cortex-A7
nonsecure
(Linux)
Visual LTDC LTDC ☐ ☐ Shareable (multiple choices supported)

3.2.2. On STM32MP15x lines More info.png[edit | edit source]↑

Click on How to.png to expand or collapse the legend...

Domain Peripheral Runtime allocation Comment How to.png
Instance Cortex-A7
secure
(OP-TEE) 		Cortex-A7
nonsecure
(Linux) 		Cortex-M4

(STM32Cube)
Visual LTDC LTDC ☐

3.2.3. On STM32MP21 unknown microprocessor device[edit | edit source]↑

The table below is applicable to any TD flavor (A35-TD or M33-TD) More info green.png.

Click on How to.png to expand or collapse the legend...

Domain Peripheral Runtime allocation Comment How to.png
Instance Cortex-A35
secure
(OP-TEE /
TF-A BL31) 		Cortex-A35
nonsecure
(Linux) 		Cortex-M33
secure
(TF-M) 		Cortex-M33
nonsecure
(STM32Cube)
Visual LTDC LTDC_CMN ⬚OP-TEE ☐ ⬚ ☐
LTDC_L1L2 ⬚OP-TEE ☐ ⬚ ☐
LTDC_L3 ☐OP-TEE ☐ ⬚ ☐

3.2.4. On STM32MP23 unknown microprocessor device[edit | edit source]↑

The table below is applicable to any TD flavor (A35-TD or M33-TD) More info green.png.

Click on How to.png to expand or collapse the legend...

Domain Peripheral Runtime allocation Comment How to.png
Instance Cortex-A35
secure
(OP-TEE /
TF-A BL31) 		Cortex-A35
nonsecure
(Linux) 		Cortex-M33
secure
(TF-M) 		Cortex-M33
nonsecure
(STM32Cube)
Visual LTDC LTDC_CMN ⬚OP-TEE ☐ ⬚ ☐
LTDC_L1L2 ⬚OP-TEE ☐ ⬚ ☐
LTDC_L3 ☐OP-TEE ☐ ⬚ ☐
LTDC_ROT ⬚OP-TEE ☐ ⬚ ☐

3.2.5. On STM32MP25 unknown microprocessor device[edit | edit source]↑

The table below is applicable to any TD flavor (A35-TD or M33-TD) More info green.png.

Click on How to.png to expand or collapse the legend...

Domain Peripheral Runtime allocation Comment How to.png
Instance Cortex-A35
secure
(OP-TEE /
TF-A BL31) 		Cortex-A35
nonsecure
(Linux) 		Cortex-M33
secure
(TF-M) 		Cortex-M33
nonsecure
(STM32Cube) 		Cortex-M0+
(STM32Cube)
Visual LTDC LTDC_CMN ⬚OP-TEE ☐ ⬚ ☐
LTDC_L1L2 ⬚OP-TEE ☐ ⬚ ☐
LTDC_L3 ☐OP-TEE ☐ ⬚ ☐
LTDC_ROT ⬚OP-TEE ☐ ⬚ ☐

4. Software frameworks and drivers[edit | edit source]↑

Below are listed the software frameworks and drivers managing the LTDC peripheral for the embedded software components listed in the above tables.

5. How to assign and configure the peripheral[edit | edit source]↑

The peripheral assignment can be done via the STM32CubeMX graphical tool (and manually completed if needed).
This tool also helps to configure the peripheral:

  • partial device trees (pin control and clock tree) generation for the OpenSTLinux software components,
  • HAL initialization code generation for the STM32CubeMPU Package.

The configuration is applied by the firmware running in the context in which the peripheral is assigned.

See also additional information in the LTDC device tree configuration article for Linux®.

6. How to go further[edit | edit source]↑

Refer to STM32 LTDC application note (AN4861) [2] for a detailed description of the LTDC peripheral and applicable use-cases.

Even if this application note is related to STM32 microcontrollers, it also applies to STM32 MPUs.

You may be interested in the following related articles:


6.1. Shared LTDC layers use cases[edit | edit source]↑

The STM32 LTDC internal peripheral can be used in various "shared" LTDC layers use cases. Please refer to following articles to go further:

7. References[edit | edit source]↑

  1. ↑ U-Boot framework
  2. ↑ LCD-TFT display controller (LTDC) on STM32 MCUs application note (AN4861)


Microprocessor unit

LCD TFT display controller (STM32 specific)

Colour look-up table

Mobile industry processor interface, open membership organization that includes leading companies in the mobile industry that share the objective of defining and promoting open specifications for interfaces inside mobile terminals, see MIPI® Alliance standard web site https://www.mipi.org

Display serial interface (MIPI® Alliance standard)

fourcc of YUV420 semi-planar pixel format

Resource isolation slave Unit for peripherals - NEW

Resource isolation framework

Resource isolation master Unit - NEW

Flat panel display (https://en.wikipedia.org/wiki/FPD-Link) - NEW

Open LVDS display interface (https://en.wikipedia.org/wiki/OpenLDI) - NEW

Low-voltage differential signaling (related to display interfaces) - NEW

Board support package

Arm® is a registered trademark of Arm Limited (or its subsidiaries) in the US and/or elsewhere. Arm logo.png

Cortex®

Das U-Boot -- the universal boot loader (see U-Boot)

Read only memory

Trusted firmware for Arm® Cortex®-A (see TF-A)

Boot loader stage 2

Arm® Cortex®-A35 trusted domain

Arm® Cortex®-M33 trusted domain

MCUboot is a secure bootloader for 32-bits microcontrollers (see https://docs.mcuboot.com) - NEW

Open portable trusted execution environment

Linux® is a registered trademark of Linus Torvalds.

Trusted firmware for Arm® Cortex®-M (see TF-M) - NEW

User interface

Hardware abstraction layer

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