- Last edited 5 months ago ago
SDMMC internal peripheral
Contents
1 Article purpose[edit]
The purpose of this article is to
- briefly introduce the SDMMC peripheral and its main features
- indicate the level of security supported by this hardware block
- explain how each instance can be allocated to the three runtime contexts and linked to the corresponding software components
- explain, when necessary, how to configure the SDMMC peripheral.
2 Peripheral overview[edit]
The SDMMC peripheral is used to interconnect STM32 MPU to SD memory cards, SDIO and MMC devices.
2.1 Features[edit]
Refer to the STM32MP15 reference manuals for the complete list of features, and to the software components, introduced below, to see which features are implemented.
2.2 Security support[edit]
SDMMC1/2/3 instances are either non-secure or secure peripherals (under ETZPC control).
3 Peripheral usage and associated software[edit]
3.1 Boot time[edit]
SDMMC1/2 instances can be used to support memory boot on SD or MMC Flash devices.
The SDMMC3 is not used at boot time.
3.2 Runtime[edit]
3.2.1 Overview[edit]
SDMMC1/2/3 instances can be allocated to:
- the Arm® Cortex®-A7 non-secure core to be controlled in Linux® by the MMC framework
or
- the Arm® Cortex®-M4 to be controlled in STM32Cube MPU Package by STM32Cube SDMMC driver
Chapter #Peripheral assignment describes which peripheral instance can be assigned to which context.
3.2.2 Software frameworks[edit]
Internal peripherals software table template
| Mass storage | SDMMC | | Linux MMC framework | STM32Cube SDMMC driver | |- |}
3.2.3 Peripheral configuration[edit]
The configuration is applied by the firmware running in the context to which the peripheral is assigned. The configuration can be done alone via the STM32CubeMX tool for all internal peripherals, and then manually completed (particularly for external peripherals), according to the information given in the corresponding software framework article.
For Linux® kernel configuration, please refer to SDMMC device tree configuration.
3.2.4 Peripheral assignment[edit]
Internal peripherals assignment table template
| rowspan="3" | Mass storage | rowspan="3" | SDMMC | SDMMC1 | | ☐ | | |- | SDMMC2 | | ☐ | | |- | SDMMC3 | | ☐ | ☐ | Assignment (single choice) |-
|}