Difference between revisions of "Coprocessor power management"

[quality revision] [quality revision]
m (Low power modes available on the chip)
m
 

Template:ArticleMainWriter Template:ArticleApprovedVersion

1 Article purpose[edit]

The purpose of this article is to give an overview of the software APIs available on the Arm® Cortex®-M4 (also named MCU) side to handle the low power modes.

2 Low power modes available on the chip[edit]

Refer to STM32MP15 reference manuals for the full description of the modes.
The AN5109 low power application note also gives details on these modes.

The modes are handled by RCC and PWR peripherals.


The table below explains the chip hardware states corresponding to each low power mode.

Subsystem either refers to Arm® Cortex®-A7 side (also called MPU) or Arm® Cortex®-M4 side (also called MCU). A mode prefixed by 'C' refers to a subsystem mode.

A platform mode is the combination of MPU and MCU modes.

Level Mode Vddcore state Clocks state
Subsystem MPU CRun on on
MPU CStop on Subsystem off
MPU CStandby on Subsystem off
MCU CRun on on
MCU CStop on Subsystem off
MPU mode MCU mode Platform mode Vddcore state Clocks state
CRun CRun Run On On
CStop CRun Run On On
CStandby CRun Run On On
CRun CStop Run On On
CStop CStop Stop/LPLV-Stop/Standby On/Retention/Off Off/Off/Off
CStandby CStop Stop/LPLV-Stop/Standby On/Retention/Off Off/Off/Off

2.1 Wakeup sources[edit]

The above modes are left due to a wakeup event. It can be configured by setting the wakeup control feature of the IP and activating the corresponding EXTI on MCU side.

The following table gives the list of wakeup sources available in each mode.

Mode Available wakeup sources
CStop/CStandby/Stop BOR, PVD, AVD, Vbat mon, Temp mon, LSE CSS, RTC, TAMP, USB, CEC, ETH, USART, I²C, SPI, LPTIM, IWDG, GPIO, Wakeup pins
LPLV-Stop BOR, PVD, AVD, Vbat mon, Temp mon, LSE CSS, RTC, TAMP, IWDG, GPIO, Wakeup pins
Standby BOR, Vbat mon, Temp mon, LSE CSS, RTC, TAMP, IWDG, Wakeup pins

3 Software overview[edit]

The power HAL is used to select the Cortex-M4 low power mode. The MPU uses the Linux® RPMsg framework to communicate with the MCU.

Further information on HAL can be found here: STM32CubeMP1 architecture


3.1 APIs description[edit]

The power HAL supports the following APIs related to power management:

 HAL_PWR_EnterSLEEPMode: CSleep mode is entered
 HAL_PWR_EnterStopMode: CStop mode is entered allowing Stop as the deepest platform low power mode 
 HAL_PWR_EnterStandbyMode: CStop mode is entered allowing Standby as the deepest platform low power mode

3.2 Code source location[edit]

STM32CubeMP1 Package provides power HAL driver: Drivers/STM32MP1xx_HAL_Driver/Src/stm32mp1xx_hal_pwr.c


<noinclude>

{{ArticleMainWriter | OlivierB}}
{{ArticleApprovedVersion | OlivierB | LoicP, GeraldB | No previous approved version | AlainF - 21Jan'19 - 10389 | 21Jan'19}}
[[Category:Coprocessor management STM32Cube]]</noinclude>

==Article purpose==

The purpose of this article is to give an overview of the software APIs available on the Arm<sup>&reg;</sup> Cortex<sup>&reg;</sup>-M4 (also named MCU) side to handle the low power modes.

==Low power modes available on the chip==

Refer to [[STM32MP15 resources#Reference manuals|STM32MP15 reference manuals]] for the full description of the modes.<br>

The [[STM32MP15 resources#AN5109|AN5109 low power application note]] also gives details on these modes.

The modes are handled by [[RCC internal peripheral|RCC]] and [[PWR internal peripheral|PWR]] peripherals. 

The table below explains the chip hardware states corresponding to each low power mode.

Subsystem either refers to Arm<sup>&reg;</sup> Cortex<sup>&reg;</sup>-A7 side (also called MPU) or Arm<sup>&reg;</sup> Cortex<sup>&reg;</sup>-M4 side (also called MCU).
A mode prefixed by 'C' refers to a subsystem mode.

A platform mode is the combination of MPU and MCU modes.

{| class="wikitablest-table"
|-
! Level !! Mode !! Vddcore state !! Clocks state
|-
| rowspan="5" | Subsystem || MPU CRun || on || on
|-
| MPU CStop || on || Subsystem off
|-
| MPU CStandby || on || Subsystem off
|-
| '''MCU CRun''' || '''on''' || '''on'''
|-
| '''MCU CStop''' || '''on''' || '''Subsystem off'''
|}

{| class="wikitablest-table"
|-
! MPU mode !! MCU mode !! Platform mode !! Vddcore state !! Clocks state
|-
| CRun || CRun || Run || On || On
|-
| CStop || CRun || Run || On || On
|-
| CStandby || CRun || Run || On || On
|-
| CRun || CStop || Run || On || On
|-
| CStop || CStop || Stop/LPLV-Stop/Standby || On/Retention/Off || Off/Off/Off
|-
| CStandby || CStop || Stop/LPLV-Stop/Standby  || On/Retention/Off || Off/Off/Off
|}

===Wakeup sources===

The above modes are left due to a wakeup event. 
It can be configured by setting the wakeup control feature of the IP and activating the corresponding '''EXTI''' on MCU side.
The following table gives the list of wakeup sources available in each mode.

{| class="wikitablest-table"
|-
! Mode !! Available wakeup sources
|-
| CStop/CStandby/Stop || BOR, PVD, AVD, Vbat mon, Temp mon, LSE CSS, RTC, TAMP, USB, CEC, ETH, USART, I²C, SPI, LPTIM, IWDG, GPIO, Wakeup pins
|-
| LPLV-Stop || BOR, PVD, AVD, Vbat mon, Temp mon, LSE CSS, RTC, TAMP, IWDG, GPIO, Wakeup pins
|-
| Standby || BOR, Vbat mon, Temp mon, LSE CSS, RTC, TAMP, IWDG, Wakeup pins
|}

==Software overview==

The power HAL is used to select the Cortex-M4 low power mode.
The MPU uses the Linux<sup>&reg;</sup> RPMsg framework to communicate with the MCU.
Further information on HAL can be found here: [[STM32CubeMP1 architecture]]

===APIs description===

The power HAL supports the following APIs related to power management:

  HAL_PWR_EnterSLEEPMode: CSleep mode is entered

  HAL_PWR_EnterStopMode: CStop mode is entered allowing Stop as the deepest platform low power mode 

  HAL_PWR_EnterStandbyMode: CStop mode is entered allowing Standby as the deepest platform low power mode

===Code source location===
[[STM32CubeMP1 Package]] provides power HAL driver:</br>

{{CodeSource | STM32CubeMP1 | Drivers/STM32MP1xx_HAL_Driver/Src/stm32mp1xx_hal_pwr.c}}

<noinclude>

[[Category:Coprocessor management STM32Cube]]
{{PublicationRequestId | 10389 | 2019-01-21 | AlainF}}</noinclude>
(4 intermediate revisions by 3 users not shown)
Line 1: Line 1:
<noinclude>
 
{{ArticleMainWriter | OlivierB}}
 
{{ArticleApprovedVersion | OlivierB | LoicP, GeraldB | No previous approved version | AlainF - 21Jan'19 - 10389 | 21Jan'19}}
 
[[Category:Coprocessor management STM32Cube]]
 
</noinclude>
 
 
 
==Article purpose==
 
==Article purpose==
   
Line 24: Line 18:
 
A platform mode is the combination of MPU and MCU modes.
 
A platform mode is the combination of MPU and MCU modes.
   
{| class="wikitable"
+
{| class="st-table"
 
|-
 
|-
 
! Level !! Mode !! Vddcore state !! Clocks state
 
! Level !! Mode !! Vddcore state !! Clocks state
Line 39: Line 33:
 
|}
 
|}
   
{| class="wikitable"
+
{| class="st-table"
 
|-
 
|-
 
! MPU mode !! MCU mode !! Platform mode !! Vddcore state !! Clocks state
 
! MPU mode !! MCU mode !! Platform mode !! Vddcore state !! Clocks state
Line 58: Line 52:
 
===Wakeup sources===
 
===Wakeup sources===
   
The above modes are left due to a wakeup event.
+
The above modes are left due to a wakeup event. It can be configured by setting the wakeup control feature of the IP and activating the corresponding '''EXTI''' on MCU side.
   
 
The following table gives the list of wakeup sources available in each mode.
 
The following table gives the list of wakeup sources available in each mode.
   
{| class="wikitable"
+
{| class="st-table"
 
|-
 
|-
 
! Mode !! Available wakeup sources
 
! Mode !! Available wakeup sources
Line 76: Line 70:
   
 
The power HAL is used to select the Cortex-M4 low power mode.
 
The power HAL is used to select the Cortex-M4 low power mode.
  +
The MPU uses the Linux<sup>&reg;</sup> RPMsg framework to communicate with the MCU.
   
 
Further information on HAL can be found here: [[STM32CubeMP1 architecture]]
 
Further information on HAL can be found here: [[STM32CubeMP1 architecture]]
  +
   
 
===APIs description===
 
===APIs description===
Line 92: Line 88:
 
[[STM32CubeMP1 Package]] provides power HAL driver:</br>
 
[[STM32CubeMP1 Package]] provides power HAL driver:</br>
 
{{CodeSource | STM32CubeMP1 | Drivers/STM32MP1xx_HAL_Driver/Src/stm32mp1xx_hal_pwr.c}}
 
{{CodeSource | STM32CubeMP1 | Drivers/STM32MP1xx_HAL_Driver/Src/stm32mp1xx_hal_pwr.c}}
  +
  +
<noinclude>
  +
[[Category:Coprocessor management STM32Cube]]
  +
{{PublicationRequestId | 10389 | 2019-01-21 | AlainF}}
  +
</noinclude>