STGEN internal peripheral

Applicable for

STM32MP13x lines, STM32MP15x lines

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1. Article purpose

The purpose of this article is to:

• briefly introduce the STGEN peripheral and its main features,
• indicate the peripheral instances assignment at boot time and their assignment at runtime (including whether instances can be allocated to secure contexts),
• list the software frameworks and drivers managing the peripheral,
• explain how to configure the peripheral.

2. Peripheral overview

The STGEN peripheral provides the reference clock used by the Arm^® Cortex^®-A7 generic timer for its counters, including the system tick generation.

It is clocked by either HSI(High Speed Internal oscillator) or HSE(High Speed External oscillator). During boot phase, STGEN is clocked by HSI until HSE is setup. This should be done at an early stage. Caution is needed when switching from one source to another as the STGEN counter must be updated according to the new frequency. Otherwise, the time reference will be incorrect.

The STGEN is a single-instance peripheral that can be accessed via the two following register sets:

• STGENC for the control: secure port,
• STGENR for the read-only access: non secure port.

Refer to the STM32 MPU reference manuals for the complete list of features, and to the software frameworks and drivers, introduced below, to see which features are implemented.

3. Peripheral usage

This chapter is applicable in the scope of the OpenSTLinux BSP running on the Arm^® Cortex^®-A processor(s), and the STM32CubeMPU Package running on the Arm^® Cortex^®-M processor.

3.1. Boot time assignment

3.1.1. On STM32MP1 series

The STGEN is first initialized by the ROM code, then updated by the FSBL (see Boot chain overview) once the HSE clock is set up.

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Check boxes illustrate the possible peripheral allocations supported by STM32 MPU Embedded Software:

• ☐ means that the peripheral can be assigned to the given boot time context.
• ☑ means that the peripheral is assigned by default to the given boot time context and that the peripheral is mandatory for the STM32 MPU Embedded Software distribution.
• ⬚ means that the peripheral can be assigned to the given boot time context, but this configuration is not supported in STM32 MPU Embedded Software distribution.
• ✓ is used for system peripherals that cannot be unchecked because they are hardware connected in the device.

The present chapter describes STMicroelectronics recommendations or choice of implementation. Additional possibilities might be described in STM32 MPU reference manuals.

Domain	Peripheral	Boot time allocation				Comment
		Instance	Cortex-A7 secure (ROM code)	Cortex-A7 secure (TF-A BL2)	Cortex-A7 non-secure (U-Boot)
Core	STGEN	STGEN	✓	✓

3.2. Runtime assignment

3.2.1. On STM32MP13x lines 

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STM32MP13 internal peripherals

Check boxes illustrate the possible peripheral allocations supported by STM32 MPU Embedded Software:

• ☐ means that the peripheral can be assigned to the given runtime context.
• ☑ means that the peripheral is assigned by default to the given runtime context and that the peripheral is mandatory for the STM32 MPU Embedded Software distribution.
• ⬚ means that the peripheral can be assigned to the given runtime context, but this configuration is not supported in STM32 MPU Embedded Software distribution.
• ✓ is used for system peripherals that cannot be unchecked because they are hardware connected in the device.

Refer to How to assign an internal peripheral to an execution context for more information on how to assign peripherals manually or via STM32CubeMX.
The present chapter describes STMicroelectronics recommendations or choice of implementation. Additional possibilities might be described in STM32MP13 reference manuals.

Domain	Peripheral	Runtime allocation			Comment
		Instance	Cortex-A7 secure (OP-TEE)	Cortex-A7 non-secure (Linux)
Core	STGEN	STGEN	✓

3.2.2. On STM32MP15x lines 

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STM32MP15 internal peripherals

Check boxes illustrate the possible peripheral allocations supported by STM32 MPU Embedded Software:

• ☐ means that the peripheral can be assigned to the given runtime context.
• ☑ means that the peripheral is assigned by default to the given runtime context and that the peripheral is mandatory for the STM32 MPU Embedded Software distribution.
• ⬚ means that the peripheral can be assigned to the given runtime context, but this configuration is not supported in STM32 MPU Embedded Software distribution.
• ✓ is used for system peripherals that cannot be unchecked because they are hardware connected in the device.

Refer to How to assign an internal peripheral to an execution context for more information on how to assign peripherals manually or via STM32CubeMX.
The present chapter describes STMicroelectronics recommendations or choice of implementation. Additional possiblities might be described in STM32MP15 reference manuals.

Domain	Peripheral	Runtime allocation				Comment
		Instance	Cortex-A7 secure (OP-TEE)	Cortex-A7 non-secure (Linux)	Cortex-M4 (STM32Cube)
Core	STGEN	STGEN	✓

4. Software frameworks and drivers

Below are listed the software frameworks and drivers managing the STGEN peripheral for the embedded software components listed in the above tables.

Linux^®/ U-Boot use the Arm Cortex-A7 generic timer that gets its counter from the STGEN, but this is transparent at runtime: therefore, there is no framework or driver to notice for these components.

In OP-TEE, the STGEN's counter value is saved/restored during low-power sequences to keep the platform time coherency. The STGEN configuration is done by TF-A. The frequency of the counter is restored in TF-A as well.

• TF-A BL2: STGEN configuration and frequency restoration
• OP-TEE: Context saving

5. How to assign and configure the peripheral

The peripheral assignment can be done via the STM32CubeMX graphical tool (and manually completed if needed).
This tool also helps to configure the peripheral:

• partial device trees (pin control and clock tree) generation for the OpenSTLinux software components,
• HAL initialization code generation for the STM32CubeMPU Package.

The configuration is applied by the firmware running in the context in which the peripheral is assigned.

System time generator

Arm^® is a registered trademark of Arm Limited (or its subsidiaries) in the US and/or elsewhere.

Cortex^®

High speed internal oscillator (STM32 clock source) or High speed synchronous serial interface (MIPI^® Alliance standard)

High speed external oscillator (STM32 clock source)

Board support package

First stage boot loader

Read only memory

Trusted firmware for Arm^® Cortex^®-A

Boot loader stage 2

Das U-Boot -- the universal boot loader (see U-Boot)

Open portable trusted execution environment

Linux^® is a registered trademark of Linus Torvalds.

Hardware abstraction layer

System time generator

Arm^® is a registered trademark of Arm Limited (or its subsidiaries) in the US and/or elsewhere.

Cortex^®

High speed internal oscillator (STM32 clock source) or High speed synchronous serial interface (MIPI^® Alliance standard)

High speed external oscillator (STM32 clock source)

Board support package

First stage boot loader

Read only memory

Trusted firmware for Arm^® Cortex^®-A

Boot loader stage 2

Das U-Boot -- the universal boot loader (see U-Boot)

Open portable trusted execution environment

Linux^® is a registered trademark of Linus Torvalds.

Hardware abstraction layer

Mobile Industry Processor Interface, open membership organization that includes leading companies in the mobile industry that share the objective of defining and promoting open specifications for interfaces inside mobile terminals, see MIPI^® Alliance standard web site https://www.mipi.org