Reset device tree configuration

Revision as of 14:41, 28 March 2023 by Registered User (→‎DT bindings documentation)

1. Article purpose[edit source]

The purpose of this article is to explain how to configure the RCC internal peripheral resets using the device tree mechanism, relying on the bindings documentation, that is the description of the required and optional device-tree properties.

The peripheral can be assigned to different contexts/software components, depending on the final product needs. Refer to How to assign an internal peripheral to a runtime context article for guidelines on this configuration .

2. Reset controller providers[edit source]

There are 2 reset controller providers in STM32MP1. Each are represented by node(s) in the device tree description. Their node must define a value for specifier #reset-cells.

  • STM32MP1 RCC reset controllers, most of the system reset controllers actually.
  • SCMI reset domains are reset controllers registered by the SCMI drivers.
    The STM32MP1 uses SCMI reset domains to abstract RCC secure reset controllers.

This article describes the device configuration where RCC TZEN ("security support" chapter) security hardening is enabled.

3. DT bindings documentation[edit source]

The device tree binding documents are stored either in the given applicable components listed below, or in the Linux kernel repository:

As RCC IP is both a reset and a clock controller, the device tree binding is same document.

4. DT configuration[edit source]

4.1. DT configuration (STM32 level)[edit source]

The device tree description of the STM32 SoC includes reset controllers exposed by RCC reset controller device driver and SCMI reset domain device driver.

4.1.1. STM32MP1 RCC Reset node[edit source]

The device tree defines the RCC reset controllers device as a node with compatible = "st,stm32mp1-rcc" or "st,stm32mp1-rcc-secure" node.

  • "st,stm32mp1-rcc-secure" complies with configuration where RCC TZEN ("security support" chapter) secure hardening is enabled.
  • "st,stm32mp1-rcc" complies with configuration where RCC TZEN ("security support" chapter) secure hardening is disabled.

The node defines #reset-cells = <1>;.
STM32MP1 RCC Reset controllers are identified by a single 32-bit ID. Valid values for the IDs are defined in STM32MP1 Reset DT bindings[1].

The STM32MP1 RCC Reset node is the same node as the STM32MP1 RCC Clock (they share same hardware IP) and is located in the stm32mp151.dtsi[2], hence one can also see #clock-cells = <1>; in the node. See the Device tree for further explanation.

 rcc: rcc@50000000 {
	compatible = "st,stm32mp1-rcc-secure", "st,stm32mp1-rcc", "syscon";
 	#clock-cells = <1>;
 	#reset-cells = <1>;
 	reg = <0x50000000 0x1000>;
 	...
 };
Warning white.png Warning
This device tree part is related to STM32MP1 microprocessors. It must be kept as-is, without being modified by the end-user.

4.1.2. SCMI Reset Domain node[edit source]


The device tree defines SCMI reset domains using compatible = "arm,scmi" nodes with subnodes specifying protocol@16 (reg = <0x16>) together with specifier '#reset-cells = 1. The reset consumer uses node phandle (scmi0_reset in example below) together with a reset ID based macros RST_SCMIx_* defined in STM32MP1 Reset DT bindings[3] to identify a SCMI reset domain related to an agent interface.

scmi: scmi {
	compatible = "linaro,scmi-optee";
	#address-cells = <1>;
	#size-cells = <0>;

	scmi_reset: protocol@16 {
		reg = <0x16>;
		#reset-cells = <1>;
	};
};
Warning white.png Warning
This device tree part is related to STM32MP1 microprocessors. It must be kept as-is, without being modified by the end-user.

4.2. DT configuration (board level)[edit source]

If a Linux driver needs a reset signal, it should be declared in its DT node as shown below:
resets = <phandle> : List of phandle and reset specifier pairs, one pair for each reset signal that affects the device, or that the device manages.

  • Example:
 i2c2: i2c@40013000 {
 	compatible = "st,stm32f7-i2c";
 	reg = <0x40013000 0x400>;
 	clocks = <&rcc I2C2_K>;
 	resets = <&rcc I2C2_R>;
        ...
 };

 i2c4: i2c@5c002000 {
 	compatible = "st,stm32f7-i2c";
 	reg = <0x5c002000 0x400>;
 	clocks = <&scmi_clk CK_SCMI_I2C4>;
 	resets = <&scmi_reset RST_SCMI_I2C4>;
        ...
 };

5. How to configure the DT using STM32CubeMX[edit source]

The STM32CubeMX tool can be used to configure the STM32MP1 device and get the corresponding platform configuration device tree files.
The STM32CubeMX may not support all the properties described in the above DT bindings documentation paragraph. If so, the tool inserts user sections in the generated device tree. These sections can then be edited to add some properties, which are preserved from one generation to another. Refer to STM32CubeMX user manual for further information.

6. References[edit source]

Please refer to the following links for additional information: