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| <span id="UART instances | | <span id="UART instances boot source disabling">UART instances boot source disabling</span> | ||
| If it is different from zero, then each bit disables an UART instance. | | If it is different from zero, then each bit disables an UART instance. | ||
<div class="mw-collapsible mw-collapsed"> | <div class="mw-collapsible mw-collapsed"> | ||
Latest revision as of 17:33, 10 December 2024
1. Memory mapping
The table below gives an overview of the BSEC OTP memory mapping with useful information in the context of this Wiki reading.
OTP words 0 to 31 are called lower OTP and words 32 to 95 are called upper OTP.
Further information for the words and fields that are not explicitly described here can be found in the reference
manual.
| OTP word | Bit field (size) | Name | Description |
|---|---|---|---|
| 0 | 31-7 (25 bits) | reserved | |
| 6 (1 bit) | is closed |
| |
| 5-0 (6 bits) | reserved | ||
| 1-2 | - | - | See the reference manual |
| 3 | 31-30 (2 bits) | HSE value | |
| 29-27 (3 bits) | primary boot source | ||
| 26-24 (3 bits) | secondary boot source | ||
| 23-16 (8 bits) | boot source disable | If it is different from zero, each bit disables a boot source. | |
| 15 (1 bit) | data cache disabling | ||
| 14-7 (8 bits) | UART instances boot source disabling | If it is different from zero, then each bit disables an UART instance. | |
| 6 (1 bit) | USB DP pullup disabling | ||
| 5 (1 bit) | PLL disabling | ||
| 4-3 (2 bits) | SD card memory interface | ||
| 2-1 (2 bits) | e•MMC™ memory interface | ||
| 0 (1 bit) | QSPI non default AFmux | ||
| 4 | 31-0 (32 bits) | monotonic counter | This is an anti rollback monotonic counter. On closed devices, the ROM code checks if it is less or equal to the version stored in the loaded image header. |
| 5-7 | 31-28 (4 bits) | AFmux configuration - port1[3:0] | Bank id |
| 27-24 (4 bits) | AFmux configuration - pin1[3:0] | Pin id | |
| 23-20 (4 bits) | AFmux configuration - afmux1[3:0] | AFmux value | |
| 19-16 (4 bits) | AFmux configuration - mode1[3:0] | Pin mode | |
| 15-12 (4 bits) | AFmux configuration - port0[3:0] | Bank id | |
| 11-8 (4 bits) | AFmux configuration - pin0[3:0] | Pin id | |
| 7-4 (4 bits) | AFmux configuration - afmux0[3:0] | AFmux value | |
| 3-0 (4 bits) | AFmux configuration - mode0[3:0] | Pin mode | |
| 8 | 31-10 (22 bits) | reserved | |
| 9 (1 bit) | SSP success | ||
| 8 (1 bit) | SSP request | ||
| 7-0 (8 bits) | reserved | ||
| 9 | 31 (1 bit) | nand param stored in otp | FMC NAND parameters storage flag
Notes:
|
| 30-29 (2 bits) | nand page size[1:0] | FMC or serial NAND page size | |
| 28-27 (2 bits) | nand block size[1:0] | FMC or serial NAND block size | |
| 26-19 (8 bits) | nand block nb[7:0] | FMC or serial NAND number of blocks in unit of 256 blocks (nb blocks = N * 256) | |
| 18 (1 bit) | fmc nand width | FMC NAND width | |
| 17-15 (3 bits) | fmc ecc bit nb[2:0] | FMC NAND number of ECC bits | |
| 14 (1 bit) | spinand needs plane select | Serial NAND needs plane select. | |
| 13-5 (9 bits) | reserved | ||
| 4 (1 bit) | eMMC 128KB boot partition support |
||
| 3 (1 bit) | disable ddr power optim | Disable DDR PLL switch off sequence | |
| 2 (1 bit) | disable HSE bypass detection | ||
| 1 (1 bit) | disable HSE frequency autodetection | ||
| 0 (1 bit) | disable ROM code traces | ||
| 10-23 | - | - | See the reference manual. |
| 24 | 31-0 (32 bits) | PKH1 | The Public Key Hash (PKH) is the SHA256 hash of ECDSA public key used for the Secure boot. If hash = 01 02 03 04 05 06 07 08… then PKH1 = 0x01020304, PKH2 = 0x05060708, etc,… |
| 25 | 31-0 (32 bits) | PKH2 | |
| 26 | 31-0 (32 bits) | PKH3 | |
| 27 | 31-0 (32 bits) | PKH4 | |
| 28 | 31-0 (32 bits) | PKH5 | |
| 29 | 31-0 (32 bits) | PKH6 | |
| 30 | 31-0 (32 bits) | PKH7 | |
| 31 | 31-0 (32 bits) | PKH8 | |
| 32-55 | - | - | See the reference manual. |
| 56 | 31-30 (2 bits) | reserved | |
| 29-15 (15 bits) | rma relock passwd | A password is required for RMA relock request. | |
| 14-0 (15 bits) | rma unlock passwd | A password is required for RMA unlock request. | |
| 57 | 31-0 | mac[4 first octets] | ETH MAC address for STMicroelectronics boards |
| 58 | 15-0 | mac[2 last octets] | |
| 59-95 | - | - | See the reference manual. |
