Coprocessor management overview

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SUMMARY
This article provides an overview of the management of the heterogeneous asymmetric architecture implemented in the STM32 MPU microprocessor family. It provides information on mechanisms put in place to help developers to design software in the multiprocessor system.

1. System overview[edit | edit source]

The STM32 MPU multiprocessor system allows to run independent firmware on each CPU core. The below subsystems are involved in the management of the coexistence of the 2 CPU subsystems:

A Master CPU core is a general purpose Arm^® Cortex^®-A processor. It is optimized to run the Linux^® based OS.
A Slave (or coprocessor) MCU core is a general-purpose Arm^® Cortex^®-M processor. It can run the RTOS optimized for microcontrollers or a bare-metal application.
Internal memory regions. The memory access is granted for both master and slave processors:
- To load and execute coprocessor firmware and define static common structures.
- To share buffers for inter processing communication through a messaging infrastructure.
An Inter ProCessor Controller peripheral allowing a signaling system by a dedicated mailbox.
Internal peripheral resources that can be assigned to the master or the slave processor.

2. Functional features and design[edit | edit source]

In order to manage the coprocessor system, a list of services is proposed relying on the open-source RemoteProc and RPMsg frameworks:

Load and control Cortex-M firmware

The Linux OS integrates the RemoteProc framework that allows to load firmware and control remote processors.

Resources management (shared peripheral, clocks, GPIOs...)

To manage the resource allocation conflicts in multiprocessing system, the Resources management proposes some services to manage common resources.

Peripheral assignment request: the mechanism used to ensure that a peripheral is reserved for a processor usage. The principle is that a firmware requests the peripheral before starting to use it, rely on the ETZPC table.

On Cortex-A: At boot time, the ETZPC and Linux device tree are configured according to the TF-A^® device tree (refer to How to assign an internal peripheral to a runtime context for details).
On Cortex-M: the service is implemented by the Resource manager utilities.

Coprocessor resource configuration set: services available in the main processor (Cortex-A running Linux) to configure the system resources needed to operate the peripheral on the coprocessor. The service is implemented by rproc_srm driver.

Inter processor communication

Inter processor communication is based on RPMsg framework and Mailbox mechanisms.

On Cortex-A:

The RemoteProc framework is in charge of enabling the IPC on Linux side, based on information available in the firmware resource table.
The RPMsg service is implemented by the RPMsg framework.
The Mailbox service is implemented by the mailbox framework.

On Cortex-M:

The RPMsg service is implemented by the OpenAMP library .
The Mailbox service is implemented by the HAL_IPCC driver.