Last edited 3 months ago

DDRCTRL and DDRPHYC device tree configuration: Revision history

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curprev18:2518:25, 10 June 2024m37,601 bytes+57udpate linkTag: 2017 source edit
Approved on 11:54, 20 June 2024

curprev18:5418:54, 7 June 2024m37,544 bytes+405â†’ phy attributesTag: 2017 source edit

curprev15:2315:23, 27 November 2023m37,139 bytes-151â†’ DT configuration (STM32 level)
Approved on 10:54, 28 November 2023
curprev14:2314:23, 27 November 2023m37,290 bytes+150â†’ DT configuration (STM32 level)

curprev11:2711:27, 20 November 2023m37,140 bytes+11â†’ info
curprev11:2411:24, 20 November 2023m37,129 bytes+177â†’ info

curprev00:5600:56, 22 October 2023m36,952 bytes+5,794â†’ Simple example

curprev23:4223:42, 21 October 2023m31,158 bytes-7,868â†’ STM32CubeMX configuration file

curprev14:4414:44, 23 June 2023m16,267 bytes0Text replacement - "STM32MP1 Series" to "STM32MP1 series"
Approved on 14:47, 23 June 2023
curprev11:0311:03, 23 June 202316,267 bytes+285Merge articles
Approved on 11:04, 23 June 2023

curprev16:2416:24, 26 October 2022m15,982 bytes+4No edit summary
Approved on 16:25, 26 October 2022

curprev17:0617:06, 25 November 202116,161 bytes-483Merge articles

curprev16:1616:16, 17 November 2021m16,644 bytes0KHz => kHz
Approved on 16:17, 17 November 2021
curprev00:0200:02, 17 November 2021m16,644 bytes-1,645remove comments

curprev17:1117:11, 12 October 2021m18,289 bytes+22No edit summary

curprev16:0316:03, 14 September 2021m18,267 bytes-2No edit summary
curprev16:0116:01, 14 September 2021m18,269 bytes+279No edit summary

curprev11:5411:54, 23 June 2021m17,376 bytes+289â†’ DT bindings documentation
curprev11:5211:52, 23 June 2021m17,087 bytes+170â†’ Article purpose
curprev11:5111:51, 23 June 2021m16,917 bytes+296No edit summary
curprev11:4811:48, 23 June 2021m16,621 bytes0â†’ DT configuration (STM32 level)

curprev09:5809:58, 7 June 2021m16,621 bytes-655â†’ Simple example

curprev12:2412:24, 4 June 2021m17,276 bytes+57â†’ DT configuration (STM32 level)
curprev12:2212:22, 4 June 2021m17,219 bytes+34â†’ Generic DDR dtsi file
curprev12:2012:20, 4 June 2021m17,185 bytes-13â†’ STM32CubeMX configuration file
curprev12:1712:17, 4 June 2021m17,198 bytes+320â†’ phy register values

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