RIFSC device tree configuration

Applicable for

1. Article purpose[edit source]

The purpose of this article is to explain how to configure the RIFSC peripheral using the device tree mechanism, relying on the bindings documentation, that is the description of the required and optional device-tree properties.

The RIFSC peripheral configuration can only be done by the CPU running in TDCID mode.

2. DT bindings documentation[edit source]

The device tree binding documents are stored either in the given applicable components listed below:

OP-TEE:
- RIFSC device tree bindings RIFSC bindings

3. DT configuration[edit source]

This hardware description is a combination of the STM32 microprocessor device tree files (.dtsi extension) and board device tree files (.dts extension). See the Device tree for an explanation of the device-tree file organization.

STM32CubeMX can be used to generate the board device tree. Refer to How to configure the DT using STM32CubeMX for more details.

The RIFSC is the firewall controller of most of the peripherals of the platform. It is represented in the device tree as a bus node with every peripheral it protects as its sub nodes. This better represents the hardware as those peripherals are connected to this firewall bus; the RIFSC as their controller.

The RIFSC configuration is described in the "st,protreg" property. It groups the RIF configuration to apply for every resource under its protection.

3.1. DT configuration (STM32/SoC level)[edit source]

The RIFSC node is located in the device tree file for the software components supporting the peripheral and listed in the above DT bindings documentation paragraph.

Warning

This device tree part is related to STM32 microprocessors. It must be kept as is, without being modified by the end-user.

The RIFSC nodes are defined at SoC device file level as:

 //Comments
 
 rifsc: rifsc@42080000 {
       compatible = "st,stm32mp25-rifsc";
       reg = <0x42080000 0x1000>;
       #address-cells = <1>;
       #size-cells = <1>;
 
               lptimer1: timer@40090000 { //Each peripheral protected by the RIFSC is a subnode
                       compatible = "st,stm32mp25-lptimer";
                       reg = <0x40090000 0x400>;
                       interrupts = <GIC_SPI 166 IRQ_TYPE_LEVEL_HIGH>;
                       clocks = <&rcc CK_KER_LPTIM1>;
                       clock-names = "mux";
                       #size-cells = <0>;
                       status = "disabled";
               };
 
                       lptimer2: timer@400a0000 {
                       compatible = "st,stm32mp25-lptimer";
                       ...

3.2. DT configuration (board level)[edit source]

The objective of this chapter is to explain how to enable and configure the RIFSC device tree nodes for a board.

Security configurations should be done in a specific board device tree file (board-rif (secure configuration))

3.2.1. DT configuration (board level) - board device tree[edit source]

The RIFSC is default enabled at SoC device tree file level. There's nothing to add at board level.

3.2.2. DT configuration (board level) - secure configuration board device tree[edit source]

This device tree file contains the RIFSC customizable security configuration . The RISUP, RIMU and RISAL(not yet supported) configurations lust appear in this file. Extract from the stm32mp257f-ev1-ca35tdcid-rif.dtsi file:

 //Comments
 ...
 &rifsc {
       st,protreg = <
               //Secure/non-secure, privileged/non-privileged accesses from any CID are allowed
               //CID Filtering and semaphore mode disabled . Configuration is not locked
               RIFPROT(STM32MP25_RIFSC_VDEC_ID, RIF_UNUSED, RIF_UNLOCK, RIF_NSEC, RIF_NPRIV, RIF_UNUSED, RIF_SEM_DIS, RIF_CFDIS)
               RIFPROT(STM32MP25_RIFSC_VENC_ID, RIF_UNUSED, RIF_UNLOCK, RIF_NSEC, RIF_NPRIV, RIF_UNUSED, RIF_SEM_DIS, RIF_CFDIS)
               //Only secure, privileged from CID1/2 accesses to the RNG are allowed
               //CID Filtering and semaphore mode enabled with CID1/2 white-listed. Configuration is locked
               RIFPROT(STM32MP25_RIFSC_RNG_ID, RIF_CID1_BF|RIF_CID2_BF, RIF_LOCK, RIF_SEC, RIF_PRIV, RIF_UNUSED, RIF_SEM_EN, RIF_CFEN)
               RIFPROT(STM32MP25_RIFSC_PKA_ID, RIF_CID1_BF|RIF_CID2_BF, RIF_LOCK, RIF_SEC, RIF_PRIV, RIF_UNUSED, RIF_SEM_EN, RIF_CFEN)
               RIFPROT(STM32MP25_RIFSC_SAES_ID, RIF_CID1_BF|RIF_CID2_BF, RIF_LOCK, RIF_SEC, RIF_PRIV, RIF_UNUSED, RIF_SEM_EN, RIF_CFEN)
               RIFPROT(STM32MP25_RIFSC_HASH_ID, RIF_UNUSED, RIF_LOCK, RIF_SEC, RIF_PRIV, RIF_CID1, RIF_SEM_DIS, RIF_CFEN)
               RIFPROT(STM32MP25_RIFSC_CRYP1_ID, RIF_UNUSED, RIF_UNLOCK, RIF_NSEC, RIF_NPRIV, RIF_UNUSED, RIF_SEM_DIS, RIF_CFDIS)
               RIFPROT(STM32MP25_RIFSC_CRYP2_ID, RIF_UNUSED, RIF_UNLOCK, RIF_SEC, RIF_PRIV, RIF_CID2, RIF_SEM_DIS, RIF_CFEN)
               >;
               ...

 ...
 &rifsc {
       st,rimu = <
               //Master 0 will be non-secure and non-privileged on the bus
               //Its CID configuration is not inherited from the RISUP (RIF_CIDSEL_M)
               RIMUPROT(RIMU_ID(0), RIF_CID1, RIF_NSEC, RIF_NPRIV, RIF_CIDSEL_M)
               //Master 1 will be non-secure and non-privileged on the bus
               //Its CID configuration is inherited from the RISUP (RIF_CIDSEL_P)
               RIMUPROT(RIMU_ID(1), RIF_CID0, RIF_NSEC, RIF_NPRIV, RIF_CIDSEL_P)
               RIMUPROT(RIMU_ID(2), RIF_CID0, RIF_NSEC, RIF_NPRIV, RIF_CIDSEL_P)
               //Refer to the RIMU resource assignment to know the ID of each master port
               ...

Information

If a peripheral/resource is not referenced in the st,protreg property, it will not be configured by the RIFSC driver and will inherit from the RISUP/RIMU/RISAL default configuration which is fixed to non-secure, non-privileged and no CID filtering.

Information

For more information on the RIFPROT/RIMUPROT macros, please refer to the RIFPROT/RIMUPROT sections of the RIFSC bindings

4. How to configure the DT using STM32CubeMX[edit source]

The STM32CubeMX tool can be used to configure the STM32MPU device and get the corresponding platform configuration device tree files.
STM32CubeMX may not support all the properties described in DT binding files listed in the above DT bindings documentation paragraph. If so, the tool inserts user sections in the generated device tree. These sections can then be edited to add some properties, and they are preserved from one generation to another. Refer to STM32CubeMX user manual for further information.

5. References[edit source]

Refer to the following links for additional information: RIF overview