STM32MP2 boot chain overview

Applicable for

STM32MP25x lines

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1. Diagram frames and legend

The hardware execution contexts are shown with vertical frames in the boot diagrams:

• the  Arm Cortex-A secure  context, in pink
• the  Arm Cortex-A non-secure  context, in dark blue
• the  Arm Cortex-M secure  context, in light blue
• the  Arm Cortex-M non-secure  context, in light blue

The horizontal frame in:

• the bottom part shows the boot chain
• the top part shows the runtime services, that are installed by the boot chain

The legend on the right illustrates how the information about the various components shown in the frames are involved in the boot process. These are highlighted as follows:

• The box color shows the component source code origin
• The arrows show the loading and calling actions between the components
• The Cube logo is used on the top right corner of components that can be configured via STM32CubeMX
• The lock show the components that can be authenticated during the boot process

2. STM32MP25 Cortex-A35 main processor boot chain

2.1. Overview

When Cortex-A35 main processor mode is selected, the Cortex-A35 is booting first. Cortex-M33 is kept under reset by hardware until application request to start it.
STM32MP25 boot chain uses Trusted Firmware-A (TF-A) as the FSBL in order to fulfill all the requirements for security-sensitive customers, and it uses U-Boot as the SSBL executing in Cortex-A35 non-secure context.
Note that the authentication is optional with this boot chain, so it can run on any STM32MP25 device security variant (that is, with or without the Secure boot).
Refer to the security overview for an introduction of the secure features available on STM32MP25, from the secure boot up to trusted applications execution.

Once system is initialized (clock tree, regulators, system firewall) by OP-TEE secure OS, it is possible to start Cortex-M33 in coprocessor at SSBL level by the U-Boot early boot feature or, later, by the Linux remoteproc framework, depending on the application startup time-targets.

2.2. ROM code

The ROM code starts the processor in secure mode. It supports the FSBL authentication and offers authentication services to the FSBL.

2.3. First stage bootloader (FSBL)

The FSBL is executed from the SYSRAM.
Among other things, this bootloader initializes (part of) the clock tree and the DDR controller. Finally, the FSBL loads the second-stage bootloader (SSBL) into the DDR external RAM and jumps to it.
The bootloader stage 2, so called TF-A BL2, is the Trusted Firmware-A (TF-A) binary used as FSBL on STM32MP15.

2.4. Second stage bootloader (SSBL)

U-Boot is commonly used as a bootloader in embedded software and it is the one used on STM32MP15.

2.5. Linux

Linux^® OS is loaded in DDR by U-Boot and executed in the non-secure context.

2.6. Secure OS / Secure monitor

The Cortex-A7 secure world supports OP-TEE secure OS.

2.7. Coprocessor firmware

The coprocessor STM32Cube firmware can be started at the SSBL level by U-Boot with the remoteproc feature (rproc command) or, later, by Linux remoteproc framework, depending on the application startup time-targets.

Arm^® is a registered trademark of Arm Limited (or its subsidiaries) in the US and/or elsewhere.

Cortex^®

First stage boot loader

Second stage boot loader

Read only memory

Doubledata rate (memory domain)

Random access memory (Early computer memories generally hadserial access. Memories where any given address can be accessed when desired were then called "random access" to distinguish them from the memories where contents can only be accessed in a fixed order. The term is used today for volatile random-acces ssemiconductor memories.)

Trusted firmware for Arm^® Cortex^®-A

Boot loader stage 2

Linux^® is a registered trademark of Linus Torvalds.

Operating system

Das U-Boot -- the universal boot loader (see U-Boot)