How to activate PCIe ASPM

Applicable for

STM32MP25x lines

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1. Article purpose

The purpose of this article is to explain how to activate the HSE PCIe ASPM.

ASPM (Active-State Power Management) is a mechanism to progressively reduce power consumption thanks to the L0s/L1 substates.

L0s (standby) only turnoff the controller transmit lane, but the link remains active in L1 the link becomes inactive, and a link recovery is needed to reactivate the link

2. How to activate the power saving mode

By default, the PCIe ASPM is set to default (performance)

To change the PCIe ASPM to power save mode, first check that the PCIe endpoint Capability supports ASPM

root@stm32mp2:~# lspci -vv -s 03:00.0 | grep ASPM
LnkCap: Port #0, Speed 5GT/s, Width x1, ASPM L0s L1, Exit Latency L0s <4us, L1 unlimited
ClockPM+ Surprise- LLActRep- BwNot- ASPMOptComp-
LnkCtl: ASPM Disabled; RCB 64 bytes, Disabled- CommClk+

It's possible to dynamically change the policy either from the /sys/fs

root@stm32mp2:~# echo powersave > /sys/module/pcie_aspm/parameters/policy

or using the boot flag:

pcie_aspm.policy=powersave

root@stm32mp2:~# lspci -vv -s 03:00.0 | grep ASPM

               LnkCap: Port #0, Speed 5GT/s, Width x1, ASPM L0s L1, Exit Latency L0s <4us, L1 unlimited
                       ClockPM+ Surprise- LLActRep- BwNot- ASPMOptComp-
               LnkCtl: ASPM L0s L1 Enabled; RCB 64 bytes, Disabled- CommClk+

Default config can be changed with

CONFIG_PCIEASPM_POWERSAVE=y

Warning

Default is CONFIG_PCIEDEFAULT

High speed external oscillator (STM32 clock source)

Peripheral Component Interconnect express

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