1. Purpose[edit source]
This page is to explain SWIOTLB mechanism on platform which embed more than 2GB of DDR. This SWITOLB mechanism is a native Linux kernel feature which is enabled by default. More details 'here'.
2. STM32 memory space[edit source]
To understand the of the need of the SWIOTL feature, the STM32 memory space has to inspected. Basically, it can be represented as following:
- The first 2GB [0x0000 0000 - 0x7fff ffff] of the memory space is used for internal memory and peripherals registers.
- The rest of the memory space is used for the DDR:
- [0x8000 0000 - 0xffff ffff] for a 2GB DDR
- [0x8000 0000 - 0x17fff ffff] for a 4GB DDR
The CPU (cortex-A35) and some peripherals are "master" on the bus and can access directly to the DDR. Those peripherals are basically ones which embed a DMA: HPDMA, ETH, SDMMC, DCMIPP, USB3, USBH, DCMIPP, LTDC, VDENC, VENC, PCIE. Except the Cortex-A35, all those peripherals are only 32 bits compatible, meaning that they can't access to an address greater than 0xffffffff. It is not a problem for a 2GB DDR (or shorter) but for DDR greater than 2GB it is. Indeed, if a buffer is allocated inside an area above the first 2GB of DDR then bus master can't access to it.
The SWIOTLB mechanism solve this issue.
3. SWIOTLB feature[edit source]
4. Good practices[edit source]
5. References[edit source]