Last edited 7 months ago

STM32 MPU ROM code overview: Revision history

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curprev12:1112:11, 25 September 2023m44,027 bytes+48No edit summary
curprev12:0412:04, 25 September 2023m43,979 bytes0No edit summary

curprev08:4708:47, 30 August 2023m43,979 bytes+427No edit summary

curprev12:4412:44, 23 June 2023m43,552 bytes0Text replacement - "STM32MP1 Series" to "STM32MP1 series"
Approved on 12:58, 23 June 2023

curprev10:2610:26, 7 June 2023m43,552 bytes+9No edit summary
Approved on 10:27, 7 June 2023
curprev10:2510:25, 7 June 202343,543 bytes-335Merge articles

curprev15:3015:30, 2 April 2023m43,878 bytes+3No edit summary
curprev15:0815:08, 2 April 2023m43,875 bytes+248No edit summary

curprev08:4108:41, 16 March 2023m43,627 bytes-10No edit summary
curprev08:3608:36, 16 March 2023m43,637 bytes+28No edit summary

curprev14:5114:51, 14 March 2023m37,168 bytes-8No edit summary

curprev14:3114:31, 10 March 2023m37,176 bytes+216â†’ System and peripheral registers modification after boot sequence

curprev07:3207:32, 23 February 2023m36,960 bytes+139â†’ Boot from serial NOR
Approved on 15:30, 6 March 2023

curprev14:5914:59, 13 January 2023m36,821 bytes+79â†’ Flash memory boot
Approved on 08:15, 27 January 2023

curprev13:4213:42, 15 December 2022m36,742 bytes-16â†’ ROM code overview
curprev13:4113:41, 15 December 2022m36,758 bytes0â†’ RMA (return merchandise authorization)

curprev17:0417:04, 23 November 2022m36,758 bytes-10No edit summary
Approved on 17:05, 23 November 2022
curprev17:0017:00, 23 November 2022m36,768 bytes-2No edit summary

curprev14:1214:12, 27 October 2022m36,770 bytes-107No edit summary
Approved on 14:12, 27 October 2022

curprev16:1416:14, 5 October 2022m36,877 bytes-190No edit summary
Approved on 16:14, 5 October 2022
curprev16:1316:13, 5 October 2022m37,067 bytes-452No edit summary
Approved on 16:13, 5 October 2022

curprev07:5507:55, 22 September 2022m37,519 bytes+190Reverted edits by Registered User (-) to last revision by Registered UserTag: Rollback
curprev07:5207:52, 22 September 2022m37,329 bytes0â†’ Boot from parallel / serial NAND
curprev07:3607:36, 22 September 2022m37,329 bytes-190No edit summary

curprev08:4808:48, 16 September 2022m37,519 bytes+3No edit summary
curprev08:4508:45, 16 September 2022m37,516 bytes+296No edit summary
curprev06:2806:28, 16 September 2022m37,220 bytes+1â†’ Flash memory boot

curprev16:3816:38, 15 September 2022m37,219 bytes+113No edit summary
curprev12:5812:58, 15 September 2022m37,106 bytes+187No edit summary

curprev12:0612:06, 12 September 2022m36,919 bytes+1No edit summary

curprev08:5208:52, 30 August 2022m36,852 bytes0No edit summary

curprev15:1215:12, 27 July 2022m36,852 bytes+39No edit summary

curprev07:4607:46, 26 July 2022m36,813 bytes+237â†’ Boot from parallel / serial NAND

curprev14:2514:25, 21 July 2022m42,836 bytes+205â†’ Boot from parallel / serial NAND
curprev14:2414:24, 21 July 2022m42,631 bytes+6,246â†’ Boot from serial NOR
curprev14:2314:23, 21 July 2022m36,385 bytes+204â†’ Boot from parallel / serial NAND

curprev16:2016:20, 22 June 2022m36,353 bytes+191No edit summary

curprev13:4613:46, 13 June 2022m36,162 bytes-165â†’ Boot device selection
curprev13:2313:23, 13 June 2022m36,327 bytes-423â†’ Memory mapping

curprev13:5813:58, 6 May 2022m36,750 bytes+27â†’ On {{MicroprocessorDevice | device=13}}
curprev08:5608:56, 6 May 2022m36,723 bytes+216â†’ Memory mapping
curprev07:5907:59, 6 May 2022m36,507 bytes+181â†’ On {{MicroprocessorDevice | device=13}}

curprev12:3912:39, 7 April 2022m36,653 bytes-5â†’ Life cycle
curprev12:3612:36, 7 April 2022m36,658 bytes-57â†’ Life cycle
curprev09:1309:13, 7 April 2022m36,715 bytes+209â†’ Life cycle

curprev08:4708:47, 6 April 2022m36,506 bytes+470No edit summary

curprev13:4313:43, 21 March 2022m36,036 bytes+9â†’ Secure boot
curprev11:2711:27, 21 March 2022m36,027 bytes-27No edit summary

curprev07:5807:58, 14 March 2022m36,054 bytes+26No edit summary

curprev16:3616:36, 3 March 2022m36,028 bytes-185No edit summary

curprev16:2516:25, 25 February 2022m36,213 bytes+88â†’ UART Boot

curprev14:3314:33, 1 February 2022m36,125 bytes0No edit summary
curprev14:3214:32, 1 February 2022m36,125 bytes0No edit summary
curprev10:5010:50, 1 February 2022m36,125 bytes0No edit summary
curprev09:3709:37, 1 February 2022m36,125 bytes0No edit summary

curprev13:2313:23, 26 January 2022m36,125 bytes-202â†’ Boot from parallel / serial NAND
curprev10:1510:15, 26 January 2022m36,327 bytes+64â†’ Memory mapping
curprev10:0510:05, 26 January 2022m36,263 bytes+200â†’ Boot from parallel / serial NAND
curprev07:3707:37, 26 January 2022m36,063 bytes-3,327No edit summary

curprev14:4214:42, 24 January 2022m39,390 bytes+125â†’ Boot from parallel / serial NAND

curprev14:1814:18, 20 January 2022m39,265 bytes0No edit summary

curprev10:2710:27, 19 January 2022m39,265 bytes+185â†’ Boot device selection

curprev14:2714:27, 7 January 2022m39,080 bytes0â†’ USB Boot
curprev14:2614:26, 7 January 2022m39,080 bytes-218â†’ Serial boot
curprev14:2614:26, 7 January 2022m39,298 bytes+158â†’ Boot from parallel / serial NAND

curprev09:5409:54, 6 January 2022m39,140 bytes0â†’ Life cycle
curprev09:4509:45, 6 January 2022m39,140 bytes-58â†’ Boot device selection
curprev09:3509:35, 6 January 2022m39,198 bytes+272â†’ Boot device selection

curprev10:4610:46, 30 November 2021m34,300 bytes0â†’ RMA (return merchandise authorization)
curprev10:4610:46, 30 November 2021m34,300 bytes+347â†’ RMA (return merchandise authorization)

curprev09:3309:33, 22 November 2021m46,272 bytes+353No edit summary
curprev09:2909:29, 22 November 2021m45,919 bytes+153â†’ STM32 header

Retrieved from "https://wiki.st.com/stm32mpu/wiki/STM32_MPU_ROM_code_overview"

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