RNG device tree configuration

Applicable for STM32MP13x lines, STM32MP15x lines


1 Article purpose[edit]

This article explains how to configure the RNG using the device tree mechanism (DT), relying on the bindings documentation, which is the description of the required and optional device tree properties.

The peripheral can be assigned to different contexts and software components, depending on the final product needs. Refer to How to assign an internal peripheral to an execution context article for guidelines on such configuration.

2 DT bindings documentation[edit]

The device tree bindings documents are stored either in the given applicable components listed below:

3 DT configuration[edit]

This hardware description is a combination of the STM32 microprocessor device tree files (.dtsi extension) and board device tree files (.dts extension). See the Device tree for an explanation of the device tree file organization.

STM32CubeMX can be used to generate the board device tree. Refer to How to configure the DT using STM32CubeMX for more details.

3.1 DT configuration (STM32/SoC level)[edit]

The RNG node is located in the device tree file for the software components, supporting the peripheral and listed in the above DT bindings documentation paragraph.

It is only included in SoCs supporting secure boot.

Warning white.png Warning
This device tree part is related to STM32 microprocessors. It must be kept as is, without being modified by the end-user.

3.2 DT configuration (board level)[edit]

This chapter explains how to enable and configure the RNG DT nodes for a board.

The peripheral configuration must be done in the specific board device tree files (board dts file).

RNG runs on two different clocks:

  • The AHB bus clock to access registers
  • A dedicated RNG clock connected to internal random blocks

Depending on the clock source selected for the RNG clocks, the RNG dedicated clock must be higher than AHB clock / 32 if clock error detection is enabled.

Except for STM32MP15x lines More info.png:

  • An internal prescaler is calculated to set the RNG clock closed to the maximum certified frequency.
  • When the RNG is assigned to OP-TEE, it is possible to choose between several RNG configurations that best suit your need by specifying RNG_CONFIG_NIST_A_ID/RNG_CONFIG_NIST_B_ID/RNG_CONFIG_NIST_C_ID in the st,rng-config property of the rng node in the OP-TEE device tree. Please see the RNG entropy source validation sub-chapter in the RNG chapter from the STM32 MPU reference manuals

3.3 DT configuration examples[edit]

   &rng {
        status = "okay";
        clock-error-detect;      // Enable the clock error management
        st,rng-config = <RNG_CONFIG_NIST_B_ID>;       // RNG configuration to apply
   };

4 How to configure the DT using STM32CubeMX[edit]

The STM32CubeMX tool can be used to configure the STM32MPU device and get the corresponding platform configuration device tree files.
STM32CubeMX might not support all the properties described in the DT bindings files listed in the above DT bindings documentation paragraph. In such cases, the tool inserts user sections in the generated device tree. These sections can then be edited to add some properties; They are preserved from one generation to another. Refer to STM32CubeMX user manual for further information.