How to define your low-power strategy

1. Purpose

This article proposes some guidelines in order to determine the best low power strategy for your STM32MP15 product.

2. STM32MP15 power supplies

For a good understanding of this article, it is important to understand the perimeter of the two main power supplies of the STM32MP15:

• VDD supplies I/Os and analog components such as reset, power management, oscillators and PLLs. VDD is present as far as the STM32MP15 is not in Off or Vbat mode. For a given system, its voltage is fixed and chosen in the range from 1.8 V to 3.3 V supported by the STM32MP1 Series.
• VDDcore supplies the digital core domain and must be present after VDD on start up. Its voltage varies depending on the system low power mode among switched off (0 V), the retention voltage (0.9 V) and the nominal voltage (1.2 V). The mapping to the low power modes is shown in the next paragraph.

For more information, please refer to the PWR chapter of the STM32MP15 Reference Manual.

3. STM32MP15 low power modes

When the system does not need to run, various actions can be taken to reduce its power consumption:

• Stop the clocks: this corresponds to the Stop mode where the VDDcore external regulator is kept at its nominal voltage but it can even be switched in low power mode in order to reduce its power consumption: this is the LP-Stop mode.
• Reduce VDDcore voltage to its retention value: this is the LPLV-Stop mode, that allows to consume the minimum of power in order to keep the registers and internal memories contents.
• Switch off the VDDcore: this is the Standby mode, that loses all registers and internal memories contents, apart from the one that are in VSW domain (especialy the Backup registers, the Backup RAM and the Retention RAM).

When the processor is put in one of those low power mode, the external RAM (DDR) is usually put in Self-Refresh mode in order to allow it to keep its content whereas the STM32MP15 is no more active (and no more sends the clock and auto-refresh commands). This extra power consumption as to be considered at system level and it depends on the selected DDR memory so thanks to refer to your memory provider datasheet.

4. STM32MP15 low power modes overview

For each supported low power mode (described in the AN5109), the figure below shows:

• The peripherals that can be used as wake up sources (in grey boxes)
• The STM32MP15 typical power consumption (on the left)
• The system wake up times in various configurations (on the right)

Low power (MIPI^® Alliance DSI standard)

Random access memory (Early computer memories generally hadserial access. Memories where any given address can be accessed when desired were then called "random access" to distinguish them from the memories where contents can only be accessed in a fixed order. The term is used today for volatile random-acces ssemiconductor memories.)

Doubledata rate (memory domain)