- Last edited 10 months ago ago
Introduction to Low power with STM32
STM32 ultra-low-power microcontrollers offer a balance between performance, power, security, and cost effectiveness for energy-efficient embedded systems and applications. There are different ways to slow down the consumption:
- Low-power modes
- LPBAM (Low-power background autonomous mode)
1 Low-power modes
By default, the microcontroller is in Run mode after a system or power-on reset. Several low-power modes allow saving power when the CPU does not need to be kept running, or runs at a very low speed.
An example can be the wait for an external event. It is up to the user to select the mode that gives the best compromise between low-power consumption, short startup time, available peripherals, and available wake-up sources. The ultra-low-power product family, varying between the STM32 series, may support up to 6 low-power modes:
- Sleep mode
- Low-power Run mode
- Low-power Sleep mode
- Stop 0, Stop 1, Stop 2, Stop 3 modes
- Standby mode
- Shutdown mode
2 LPBAM (only for the STM32U5 series)
The LPBAM (low-power background autonomous mode) is an operating mode that allows peripherals to be functional and autonomous independently from the device power modes. The LPBAM is supported in Stop 2 mode, and enables building complex use cases with autonomous peripherals. It occurs without any CPU wake-up, thanks to the DMA transfers.
The DMA operations can be related to:
- Peripheral data transfer
- Peripheral reconfiguration
Using LPBAM optimizes automatically the consumption:
- The bus clock and kernel clocks of the peripherals are only distributed when they are requested by the autonomous peripherals. The bus clock, also named system clock, is distributed over AHB and APB to all peripherals that are enabled. These include a DMA and a SRAM at minimum.
- Internal RC oscillators are automatically powered on or powered off according to the peripheral clock requests. The external oscillators and PLL cannot be used for LPBAM.
- Analog peripherals are automatically powered on and off when needed.
- The device can be in Stop mode, without any need to wake up for managing peripheral operation. Thus, this prevents from energy loss during the device wake-up time and run operation.
A large choice of hardware triggers allows peripheral activity to start automatically, even in Stop mode. The peripheral interrupts, when they are enabled, wake up the device from Stop mode.
A typical and basic LPBAM use case is a periodic peripheral operation (such as ADC conversion, or sensor acquisition through communication interface such as I2C or SPI), when the device is in Stop 2 mode.
A wake-up source can be any of the peripheral interrupts such as:
- Peripheral end of transfer/conversion
- DMA transfer complete
- Error detection