1. Introduction
The power domains of the ST67W611M1 are divided into analog and digital domains. The analog domain is supplied through VDD33 (16) pin and the digital domain through VDDIO (9 and 25) pins. The mother board must provide these voltage supplies to the module.
2. Power supply specification
VDD33 is specified at 3.3 V typical with 2.97 V to 3.63 V range.
VDDIO can be supplied within two ranges to be decided by the customer according to the IO interface voltage of the Host:
- 3.3 V typical with 2.97 V to 3.63 V range.
- 1.8 V typical with 1.62 V to 1.98 V range.
The reference current to be considered for VDD33 is 1 A. The reference current to be considered for VDDIO is 0.5 A. The reference currents are provided to help the board designer select the supply source (LDO/buck) and route the power tracks. They are maximum values which are never exceeded in actual applications.
3. Grounding implementation
Connect all GND pins directly to a solid GND plane. Place at least 5 vias on each central PAD to ensure a good power dissipation. Drill multiple ground vias on the top and bottom layers to minimize the current return path.
4. Power supplies implementation
The power supplies for the ST67W611M1 can be generated using LDOs or bucks that can deliver the current values mentioned above. It is necessary to make sure the supply voltages are clean with minimum ripple and, in all cases, that they never go outside the specified ranges. Additional care must be given in the case of the buck layout.
When using 3.3 V for VDDIO, a single power supply source can be used for both VDD33 and VDDIO.
It is recommended to use one or two decoupling capacitors (10 μF and 100 nF) per VDDIO supply pin and one 10 μF decoupling capacitor on VDD33. Decoupling capacitors must be placed as close as possible to their corresponding pins with the ground pad of each capacitor connected to the board ground through a dedicated via.