Secure Boot for STM32H5
Target description
1. Introduction
The secure boot ensures that applications are executed only after authentication and integrity verifications.
It also ensure a secured firmware installation or firmware update.
This is called the Root Of Trust (ROT).
2. Boot stages
The first secure boot stage is done by an immutable code (that can't be modified).
Two possible Immutable Root of Trust are possible for the STM32H5.
- The STiROT: immutable code, provided by ST and integrated in the system flash of the devices supporting embedded cryptographic accelerator.
- The OEMiROT: an OEM can develop his own boot code including similar feature than STiROT. Flash write protection is used to ensure this code can't be modified (immutable).
A second boot stage is possible (optional) through the Updatable Root of Trust (uROT). Two possible uROT:
- STuROT: installable service provided by ST, includes module installation/update capability
- OEMuROT: developped by 3rd party OEM and installed through the embedded bootloader
The uROT has the advantage to be updatable for instance in case a vulnerability is detected requiring an update of the second boot stage.
In case of one boot stage:
- User application installation: the iROT ensures the authenticity and integrity of the secure/non-secure application code image(s) before installing it.
The following sections explains the possible bootpathes and the limitations depending on the procuct serie.
3. The different possible bootpaths for STM32H5
The possible bootpaths are depending on the chosen device, if it supports the embedded hardware cryptography and if Trust Zone is activated or not.
- The STM32H57 is supporting TrustZone and hardware cryptography, so all bootpathes are possible with this device
- The STM32H56 is supporting TrustZone but not the hardware cryptography (without export control constraints), so the STiROT (ST immutable Root of Trust) and the secure manager are not supported.
- The STM32H503 is not supporting TrustZone and not supporting the hardware cryptography (without export control constraints), limiting the possible use cases as explained in next sections.
The bootpath is selected through option bytes programming, as explained in next sections.
3.1. STM32H57 Bootpaths
The STM32H57x serie support services available in the embedded system flash and services that can be installed. (add link to secure manager intro)
The figure below shows the possible bootpaths selected through the related user option bytes.
Embedded hardware cryptography is used for integrity and authentication verification.
As shown in the above figure, when Trust Zone is enabled (TZEN=1) the Unique Boot Entry (UBE) is selecting which secure boot is executed after reset (STiROT or OEMiROT).
This figure shows also the optional Updatable Root Of Trust (uROT), which is a second possible boot stage.
3.2. STM32H56 Bootpaths
The STM32H6x is not supporting the STiROT and STuROT because the cryptographic hardware accelerator is not supported.
The figure below shows the remaining possible bootpaths.
3.3. STM32H50x Bootpaths
The STM32H50x is not supporting the STiROT and STuROT because the cryptographic hardware accelerator is not supported.
The activation of TrustZone is not supported with consequence that a secure user application is not possible.
4. State after reset and Isolation levels
A secure boot is guaranteed through the isolation levels (HDP).
The access and execution rights are defined for each isolation levels
The HDPL is controlled trough a protected hardware block (SBS)
- Level 0 (HDPL0): reserved for system flash memory
- Level 1 (HDPL1): user flash memory starts fully accessible
- Level2 (HDPL2): Option Bytes based HDP area protected
- Level3 (HDPL3): HDPx_EXT sectors are additionally protected