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Coming soon |
1. Introduction
The system clock manager (SCM) is module responsible for managing CPU system clock source and frequency according to Connectivity purposes.
System clock manager module defines different users that can request different configurations. Modules determines which one is best to suit the system and all SCM users needs.
SCM module also steps in low power wake-up phase by applying usable configuration for RF activities.
2. Features
2.1. SCM users principle
The module is based on a client request mechanism. SCM defines users (up to 32) that can request a clock frequency modification.
There is a system user SCM_USER_LL_FW and multiple application users can be define in addition to existing SCM_USER_APP. All users has the same weight/priority.
Among all the requests, the system clock manager determines the one that fulfills all the needs. The best system clock evaluation is realized at each new request.
2.2. Supported configurations
Supported configurations are fixed. Unlike SCM users, it is not possible to add SCM configurations over existing ones.
Each SCM configuration is used for a particular purpose.
The table below presents all the supported configuration (increasing order of priority).
| SCM configuration | Purpose |
|---|---|
| HSE16 | Nominal - no radio activity |
| HSE32 | Radio activity |
| PLL (PLL source is HSE) | PLL is used for BLE audio use cases |
Note: HSI as system clock source is not supported. Note: The SCM always select the request with the most prior configuration (as needs with the lower ones are fulfilled).
In order to achieve these configurations, SCM module is responsible to adapt several SoC related parameters:
- Flash & SRAMs latencies.
- Flash & SRAMs wait states.
- Regulator supply output voltage (VOS).
- AHB5 divider.
They are presented per SCM configuration is the table below.
|+ Supported SCM configurations ! SCM configuration !! Purpose |- | HSE16|| Nominal - no radio activity |- | HSE32 || Radio activity |- | PLL (PLL source is HSE)|| PLL is used for BLE audio use cases |}
On one hand, the decrease clock speed request is handled immediately. On the other hand, the increase clock speed request requires more time to setup. It is not blocking; an interrupt mechanism is used to switch to the requested speed. This permits the firmware to keep running at the actual clock speed until the system is ready.
3. Interfaces
TBD.
4. How to
TBD.