Getting started with LPBAM

This article explains the LPBAM feature, when and how to use it, it also provides code examples.

1. Introduction to LPBAM

The LPBAM (low-power background autonomous mode) is an operating mode that allows peripherals to be functional and autonomous independently from the device power modes, down to Stop 2 mode, without any software running. The LPBAM subsystem can chain different operations thanks to DMA linked-list transfers.
File:LPBAM in U5.png
The DMA operations can be related to:

• Peripheral data transfer
• Peripheral reconfiguration

Using LPBAM optimizes automatically the consumption:
The device can be in a low power mode down to Stop 2, without any need to wake up for managing peripheral operation, thus saving energy loss during device wakeup time and run operation.
The bus clock and kernel clocks of peripherals are distributed only when requested by the autonomous peripherals.

1.1. Smart Run Domain (SRD)

The STM32U5 is split into two domains: CPU domain (CD) and SmartRun domain (SRD) File:Smart Run Domain.png

The SRD architecture relies on a DMA allowing autonomous operation during low-power modes down to Stop 2. This architecture also features a 32-bit AHB bus matrix that interconnects:

• two masters:

– the main AHB bus matrix
– LPDMA1 (low-power DMA featuring one master port)

• two slaves:

– AHB3 peripherals including AHB to APB bridge connected to APB3
– internal SRAM4

Information

The SRAM4 is the only SRAM that can be accessed by the LPDMA1.

1.2. Peripherals supporting LPBAM

There is 2 types of peripherals :

• Autonomous peripherals : which have clock request capability and support DMA transfer in STOP mode.
• Passive peripherals : can only be reconfigured or used as trigger, they do not support DMA or clock request.

LPBAM is an operating mode that allows peripherals to function autonomously, independently of power modes, and without running any software. So autonomous peripherals can request their clock (kernel or bus clocks), and can then stay functional in Stop mode where the clocks are disabled by default to reduce consumption (except for LSE and LSI low-power low-speed oscillators).
The table below lists all peripherals that support LPBAM

Low-power mode	Peripherals
Stop 0 and Stop 1	ADC4, ADF1, DAC1, GPDMA1, LPDMA1, LPTIMx (x = 1 to 4), LPUART1, MDF1, I2Cx (x = 1 to 4), SPIx (x = 1 to 3), USARTx (x = 1 to 5)
Stop 2	ADC4, ADF1, DAC1, LPDMA1, LPTIM1, LPTIM3, LPUART1, I2C3, SPI3

1.3. LPBAM main use cases

Here below examples of use cases that can be done using LPBAM while remaining in Stop mode

• I2C slave/Master transfer - SPI or UART RX/TX

This case is applicable when interfacing with external components like a MEM sensor for example over I2C or SPI. LPBAM and LPDMA can be used to transfer data from the peripheral into memory, and the MCU core will only wake up when the transfer is completed : Wakeup on Complete.
File:I2C SPI transfer.png
There is related examples in the STM32U5 Cube Firmware :
1) STM32Cube\Repository\STM32Cube_FW_U5_V1.2.0\Projects\NUCLEO-U575ZI-Q\Applications\LPBAM\LPBAM_I2C_TransmitReceive
2) STM32Cube\Repository\STM32Cube_FW_U5_V1.2.0\Projects\NUCLEO-U575ZI-Q\Applications\LPBAM\LPBAM_SPI_TransmitReceive

• ADC or DAC conversion triggered by a low-power timer LPTIM

We can also trigger ADC with a periodic timer and store the data into memory while the rest of the device is sleeping File:ADC trigger.png
There is a related example in the STM32U5 Cube Firmware :
STM32Cube\Repository\STM32Cube_FW_U5_V1.2.0\Projects\NUCLEO-U575ZI-Q\Applications\LPBAM\LPBAM_ADC_TempSense

Information

Check AN5816 on the STM32CubeMX LPBAM TempSense application descroption and building.

• LPTIM PWM ratio change (exact example of AN4865)
• Cascading peripherals (exact example of AN5834)
• I/O control ( Our example)

2. LPBAM Example Overview

2.3. STM32CubeMX LPBAM Configuration

To create an LPBAM application using the STM32CubeMX tool, the user needs the STM32CubeMX standard view. This sets up the main application and code generation, and the LPBAM view to build the LPBAM applications.

3. References

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