STM32 MCSDK Single Shunt Phase Shift support (new in V5.Y)

This message will disappear after all relevant tasks have been resolved.

Semantic MediaWiki

There are 1 incomplete or pending task to finish installation of Semantic MediaWiki. An administrator or user with sufficient rights can complete it. This should be done before adding new data to avoid inconsistencies.

1. Single shunt phase shift overview

In the context of a single shunt topology, the purpose of the phase shifting is to shift one or two duty cycles in order to have to be able to sample current signal in the boundary zones instead of inserting a distortion window. The benefit are:

Less commutations
Less switching losses
Less acoustical noise
Better current shape

2. Single shunt phase shift comparison

File:STM32 MC Image 006.png

Single shunt with distortion window

Single shunt with phase shift

and Three shunts

3. Phase shift principle

Boundary zone 1:

FW shifts on the right the smallest duty cycle by TMIN (minimum window time for sampling)

Boundary zone 2:

FW shifts on the right the middlest duty cycle by TMIN (minimum window time for sampling)

Boundary zone 3:

FW shifts on the right the smallest duty cycle and on the left the highest duty cycle by TMIN (minimum window time for sampling)

4. Peripheral usage

Phase shifting needs the following peripherals to create the shifting. According to the advanced timer capabilities, one or two DMA channels will be used

MCU	TIM	DMA	IRQ
F0	Example	Example	Example
G0	Example	Example	Example
F3	Example	Example	Example
	Example	Example	Example
F4	Example	Example	Example
	Example	Example	Example
G4	Example	Example	Example
	Example	Example	Example
L4	Example	Example	Example
	Example	Example	Example
F7	Example	Example	Example
	Example	Example	Example

5. Single shunt phase shift scheduling

6 channels advanced timer and execution rate = 1 (G0,G4,F3,L4,F7)

6 channels advanced timer and execution rate = 2 (G0,G4,F3,L4,F7)

File:STM32 MC Image 020.png

4 channels advanced timer and execution rate = 1 (F4)

File:STM32 MC Image 022.png

4 channels advanced timer and execution rate = 2 (F4)

File:STM32 MC Image 025.png

4 channels advanced timer and execution rate = 2 (F0)

File:STM32 MC Image 028.png

6. Single shunt phase shift in the MCSDK

Single shunt is divided in 4 template files

r1_ps_pwm_fdbk.c/.h.ftl processed when the MC project uses a MCU with 6 channels advanced timer (G0,F3,G4,L4,F7)
r1_ps_4ch_pwm_fdbk.c/.h.ftl processed when the MC project uses a MCU with 4 channels advanced timer