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1. Introduction
The system clock manager (SCM) is the module responsible for managing CPU system clock source and frequency.
The system clock manager module defines different users that can request different configurations. It determines which one is best to suit the system and all the SCM user needs.
2. Features
2.1. SCM users principle
The module is based on a client request mechanism. The SCM defines users (up to 32) that can request a clock frequency modification. There is already two users defined: SCM_USER_LL_FW
(system user for Link Layer purpose) and SCM_USER_APP
(application related user).
All users have the same weight/priority.
Among all the requests, the system clock manager determines the one that fulfills all the needs. The best system clock evaluation is realized at each new request.
2.2. Supported configurations
2.2.1. Overview
Supported configurations are fixed. Unlike SCM users, it is not possible to add SCM configurations over existing ones.
Each SCM configuration is used for a particular purpose.
The table below presents all the supported configuration (increasing order of priority) and their use at system side.
SCM configuration | Purpose |
---|---|
HSE 16MHz low priority |
Nominal - no radio activity Requested in radio interrupt (ending radio event notification from link layer) |
HSE 32MHz | Radio activity Requested in radio interrupt (starting radio event notification from link layer) |
PLL high priority |
PLL is used for high-performance use cases (e.g. BLE audio) |
2.2.2. Corresponding SoC configuration
In order to achieve these configurations, the SCM module is responsible to adapt several SoC related parameters:
- Flash & SRAMs latencies.
- Flash & SRAMs wait states.
- Regulator supply output voltage (VOS).
- AHB5 divider.
They are presented per SCM configuration in the table below.
SCM configuration | Flash & SRAMs latencies | Flash & SRAMs wait states | VOS | AHB5 divider |
---|---|---|---|---|
HSE 16MHz | Flash latency: 1 SRAM1/2 latencies: 1 |
Flash WS: 1 SRAM1/2 WS: 1 |
2 | 2 |
HSE 32MHz | Flash latency: 0 SRAM1/2 latencies: 0 |
Flash WS: 0 SRAM1/2 WS: 0 |
1 | 1 |
PLL | Flash latencies: 3 SRAM1/2 latency: 0 |
Flash WS: 0 SRAM1/2 WS: 0 |
1 | 1 |
2.3. PLL usage
PLL usage and configuration are defined as follows:
- PLL source is always HSE 32MHz.
- If there is one global PLL configuration for SCM, PLL parameters (PLL mode, PLL multiplier & dividers) can be adapted to user needs with dedicated interfaces.
See PLL management interfaces section for more information.
2.4. Low power management
The SCM module is used in low power management for both low power entry and exit.
- For low power mode entry (stop1 or standby), the SCM interface
scm_setwaitstates(LP)
is used for adapting FLASH & SRAMs wait states and latencies.
- For low power mode exit (stop1 and standby), the SCM interface
scm_setup()
is used for applying the system clock configuration that was before low power entry. Regarding standby mode exit, PLL configuration is re-applied (even if not used at that time) as PLL registers has been reset.
2.5. SCM elected request execution
On one hand, decreasing the clock speed is handled immediately.
On the other hand, increasing the clock speed requires more time to setup (including oscillators to be enabled, propagation delays, PLL lock, ...). To guarantee system performances and radio activity timings, the SCM implements an interrupt based mechanism.
Indeed, when the system clock source has to be changed, the targeted oscillator (HSE or PLL) is enabled alongside dedicated RCC ready flags. The other part of the system clock configuration is done in the RCC interrupts itself once the clock is ready. This allows the firmware to keep running with the actual clock source and speed until the targeted clock is ready.
There are two RCC interrupts the SCM handles:
- RCC HSE ready flag (raised just after low power mode exit as system clock is HSI 16MHz).
- RCC PLL ready flag (always raised when the system clock is on HSE as HSE is PLL source clock).
2.6. SCM concept summary
Here is a summary diagram of the SCM module.
3. Interfaces
3.1. SCM users
The available SCM users are listed in the table below.
SCM user | Description |
---|---|
SCM_USER_LL_FW | Link Layer system user. Requests system clock change on radio starting/ending radio activity. |
SCM_USER_APP | Application related user. Requests system clock change on application needs. |
3.2. SCM functions
3.2.1. General interfaces
scm_init |
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Description
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scm_setsystemclock |
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Description
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scm_setwaitstates |
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Description
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scm_notifyradiostate |
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Description
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3.2.2. Low power management
scm_setup |
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Description
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scm_standbyexit |
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Description
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3.2.3. PLL management
scm_pll_setconfig |
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Description
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scm_pll_fractional_update |
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Description
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scm_pllready |
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Description
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3.2.4. RCC ISR handling
scm_hserdy_isr |
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Description
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scm_pllrdy_isr |
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Description
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4. How to
4.1. Initialize the SCM
In order to initialize the SCM module, scm_init
function has to be called before any Connectivity host stack initializations (that will setup the Link Layer). scm_init
is responsible for retrieving current system clock configuration (such configuration is done in common HAL function SystemClock_Config
, main.c file) to setup its internal context.
From this point, users can request system clock changes.
4.2. Request system clock change
To request a system clock change with the SCM, the only function to call is scm_setsystemclock
and precise:
- the SCM user of the request.
- the configuration to apply.