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STM32 ultra-low-power microcontrollers offer designers of energy-efficient embedded systems and applications a balance between performance, power, security and cost effectiveness. There is different ways to slowdown the consumption:
- Low power modes
- LPBAM (Low-Power Background Autonomous Mode)
1. Low-power modes
By default, the microcontroller is in Run mode after a system or power-on reset. Several low-power modes are available to save power when the CPU does not need to be kept running or runs at very low speed.
For example when waiting for an external event. It is up to the user to select the mode that gives the best compromise between low-power consumption, short startup time and available wakeup sources.
The ultra-low-power product family, depending of the series, may supports, up to 6 low-power modes to achieve the best compromise between low-power consumption, short startup time, available peripherals and available wakeup sources :
- Sleep mode
- Low power Run mode
- Low power Sleep mode
- Stop 0, Stop 1, Stop 2, Stop 3 modes
- Standby mode
- Shutdown mode
2. LPBAM (only for STM32U5 series)
The LPBAM (low-power batch autonomous mode) is an operating mode that allows peripherals to be functional and autonomous independently from the device power modes. the LPBAM is supported in Stop 0,1 and 2 modes, allowing to build complex use cases with autonomous peripherals, without any CPU wake-up thanks to DMA transfers. The DMA operations can be related to:
- Peripheral data transfer
- Peripheral reconfiguration
Using LPBAM optimizes automatically the consumption:
- The bus clock and kernel clocks of peripherals are distributed only when requested by the autonomous peripherals. The bus clock (also named system clock) is distributed over AHB and APB to all peripherals that are enabled, which includes a DMA and a SRAM at minimum.
- Internal RC oscillators are automatically powered on and off depending on peripherals clocks requests. The external oscillators and PLL cannot be used for LPBAM.
- Analog peripherals are automatically powered on and off when needed.
- The device can be in Stop mode, without any need to wake up for managing peripheral operation, thus saving energy loss during device wakeup time and run operation.
A large choice of hardware triggers allows peripheral activity to start automatically even in Stop mode. The peripheral interrupts, when enabled, wake up the device from Stop mode. A typical and basic LPBAM use case is a periodic peripheral operation (such as ADC conversion, or sensor acquisition through communication interface such as I2C or SPI), when the device is in Stop 2 mode. Wakeup source can be any of the peripheral interrupts such as:
- Peripheral end of transfer/conversion
- DMA transfer complete
- Error detection
 Getting started with low power modes |
 Getting started with low-power background autonomous mode (LPBAM) |