Introduction
This article covers general aspects of designing power supplies for STM32 MCUs. You will find general guidelines on how to choose components, elements to take care of and optional features related to power supplies.
The first part is about power supplies in general.
- Define main characteristics of power supplies and impacts on applications.
- Talk about types SMPS and LDO and compare them.
- Provide important power management considerations.
The second part specifies STM32 requirements regarding PS.
- Power architecture of STM32.
- STM32 specific requirements regarding power supplies.
- How to identify the requirements of the application.
- Included features in STM32.
1. General notions power supply
Power supply quality is fundamental for reliability of any electronic application. The purpose of this section is to get an overview of considerations about power supplies.
Ideally electronic application should be supplied with a fixed voltage, response very fast to current call and without any noise.
Applications are powered by an external source of electricity that can be a battery, a USB cable, or AC current for example. These sources can be noisy, especially if they supply power applications such as motors. Furthermore, the voltage can vary a lot, in the case of batteries depending on the charge and loading current.
The role of the power supply is to generate a steady supply voltage for the application, independent from the input voltage and output current variations. In this document a difference is made between power source and power supply.
Application: Scope of the engineering process.
Power source: External energy source given with certain characteristics. Outside of the application.
Power supply: System that converts voltage from power source to the load that must match power source and load characteristics. Inside the application.
Load: All the component that draws current from the power supply.
For more information about supplies topology for a wide variety of applications and components references see this guide:Power managment guide Power managment guide
As current exists in two major forms, Alternative (AC) and Continuous (DC) power supplies are categorized by their type of conversion AC/DC, DC/DC, DC/AC (invertor) and AC/AC. In this topic we will only cover DC/DC.
1.1. General definitions
1.1.1. Voltage
- Input Voltage
Supplies are designed to handle a range of input voltage, see absolute maximum rating. If voltage spikes from the power source exceed this limit, it could lead to destruction of the power supply, and the whole application. Chosen component must handle highest voltage spikes and not only the average voltage. Even short spikes can damage components.
- Output Voltage
The component datasheet provides a range of operating voltage. The IC might not work properly if applying insufficient voltage, on the other hand exceeding maximum value may lead to irreversible damage.
1.1.2. Current
- Max continuous current
Max continuous current corresponds to the consumption of the load in the worst-case scenario. The power supply must be able to provide this much current continuously. This gives the minimum requirement for the power supply max continuous current.
- Peak current
Peak currents are short time current spikes that occur in transient phases like power up, clock frequency shifting, high load I/O switching.
- Inrush current
In addition, the circuit contains capacitors. At power up these capacitors draws a huge amount of current to charge, this must be handled by the power supply.
- Average current
Average current is helpful to estimate energy consumption and size finite or limited power source, like battery, to guarantee lifetime. It is also possible to have a power supply that only delivers the average current and use local electricity storage like capacitors to absorb transient currents.
- Quiescent current (IQ)
Quiescent current, IQ, is the consumption of the power supply itself. This may be negligible with medium or high currents but becomes significant in low power applications.
1.1.3. Noise
This section only talks about noise as choosing criteria for supply, refer to section #Power management Decoupling to get more information about noise in general and good practice.
Some applications are especially sensitive to noise like precision analogue devices or high frequency digital ICs.
There are different notions related to noise regarding power supply:
- Intrinsic noise
Physical properties of transistors and resistors implies noise. This source of noise is independent of input, it is generated by the regulator itself, in particular the retroaction loop.
- Switching ripple (SMPS)
In SMPS #Power supply SMPS, the voltage regulation is done by switching a transistor at high-speed rate (~50kHz-2MHz), this induces voltage variation on output. The amplitude of the ripple mainly depends on the size of the inductance, the output capacitor and output current. This constitutes the main disadvantage of SMPS.
- Power-Supply Rejection Ratio (PSRR)
PSRR is the ability of the power supply to reject input noise, coming from the power source. It’s like the power supply acts as a filter. PSRR value is often given in datasheets. This is an important characteristic for low noise applications.
1.1.4. Efficiency
In high power application, power loss represents a significative amount of energy which is dissipated in heat. Taking care of efficiency initially represents a cost but might become a gain while consuming less energy and increasing reliability due to less current and heat.
In ultra-low power applications, running on battery or induced current (RFID), efficiency is key to ensure high lifetime.
1.2. Types of power supply
In DC/DC conversion, there are two major methods, linear regulator and SMPS (Switching Mode Power Supply).
1.2.1. Low Drop output (LDO)
Linear regulators are a low cost and easy way to regulate voltage. These are only step-down regulation with a minimal drop voltage Vin-Vout<Vdrop.
Low dropout regulators, LOD, are linear regulators with a low Vdrop, about 100mV-500mV, which allow output voltage very close to the input voltage.
The regulator itself doesn’t introduce much noise relatively from SMPS. Thanks to that, LDOs have good output voltage accuracy and are preferred for low noise application. These are characterized by their intrinsics noise and PSRR.
To regulate output voltage, LDO dissipates the difference in heat. Pdissipated=(Vin-Vout )*I. The major drawback is efficiency, α ≅ Vout/Vin, true if IQ≪Iout, especially when the difference between Vin and Vout is huge. Because of that they are not recommended for 1 amp or higher current applications. Otherwise make sure to have proper thermal dissipation.
Note: in low current application quiescent current, IQ, of the LDO might become significative: α ≅ (Vout*Iout) / (Vin*Iin) ; Iin = Iout+IQ
These types of power supplies are generally fully integrated and only require few simple components like resistor or capacitor.
Note: Input current is equal to output current plus the quiescent current, current consumed by the LDO itself. The input current is not influenced by the voltage drop as LDO dissipates this drop in heat.
1.2.2. SMPS
Switching Mode Power Supplies are the most efficient way to regulate voltage, up to 90% of efficiency.
They are composed with switches, transistors and diodes, that chops the current and a strong L/C filter that convert chopped to continuous current and voltage.
There is different topology of SMPS, the most common is step-down Buck regulator.
The switching transistors generate ripple which is basically noise on Vout.
Note: PSRR is not relevant concerning SMPS
Note: There is low noise SMPS that are designed to have small ripple but this lower the efficiency.
These types of power supplies are generally more expensive and take more place on PCB. It requires bigger capacitors and an inductor.
SMPS are efficient in a certain range of power, so an over dimensioned SMPS is not only more expensive but also less efficient.
Note: No like LDO, input current is equal to Iin = Vout/Vin * Iout/α plus the current consumed by the SMPS itself. The input current is smaller as the voltage drop is higher as the SMPS converts power with minimal dissipation.
Note: As SMPS requires more capacitors, the inrush current is bigger .
1.2.3. Comparing SMPS/LDO
SMPS are more efficient than LDO, especialy with big input/output votage difference.
LDO are low cost and easy to implement, where SMPS requires a coil and more space on PCB.
LDO generates less noise than SMPS.
High PSRR LDO can be used on the output of a SMPS to reduce switching noise while achieving a good eficiency.
1.3. Power management
1.3.1. Decoupling
Noise is a large field that includes many different notions. In the case of power supply path, noise is variation of supply voltage. It is mainly introduced by load(current) variations and power conversion (LDO/SMPS…).
- Load current transient : Digital IC, motor control, communication IC, and most of loads induces current variations. Any conductor has parasitic resistance and inductance that oppose to current variations. This result to voltage drop/peek across power lines. See illustrated below voltage drop induces by current variation in a inductance:
- Not perfect power supplies regulation: The active regulation as a latency to current variations. The retroactive loop introduces noise by measurement errors. In the case of SMPS there is also the ripple due to switching, see #Noise section for more details.
- Power source : The third thing to consider is that the power source itself can be noisy for some reasons that are often out of control. Filtering can be required.
- Decoupling/Bypass capacitors
Decoupling consists of placing energy storage on different nodes of the power supply grid to locally supply these transient currents. These energy storages are capacitors placed as close as possible to transient generating circuits. The goal is to minimize the size of current loops to minimize parasitic resistors and inductance.
You can see, on Figure above, frequency response with different decoupling capacitor. Serial coil amplify high frequencies, decoupling capacitor cuts this amplification, the drawback is resonance frequency.
The second trouble is equivalent serial inductance (ESL). Al component has parasitic inductances capacitance and resistance. Figure below represent a common realistic capacitor model, in the case of decoupling we will focus on ESL.
Capacitor ESL depend mainly on technology and package type and size.
See on Figure below, that decoupling capacitors filter medium frequencies, but ESL effect take over at high frequencies.
As bigger capacitors has higher ESL due to bigger package, it is recommended to mix different size of capacitors to cover the widest band as shown in Figure below. Furthermore, placing multiple capacitors in parallel reduces equivalent serial inductance as L1//L1 = (L1*L1)/(L1+L1) = L1/2.
For digital ICs like MCU, put a capacitor as close as possible of each Vdd/Vss pin pair. If Vdd pins are not close to Vss pins, put the capacitor close to Vdd and directly to the ground plan.
It is important to select low ESR/ESL capacitors (equivalent serial resistance/inductance). Especially use ceramic SMD with the smallest package for a given capacitance. A bigger package has bigger ESL and ESR.
- Bulk capacitors
Bulk capacitors provide energy to the system to prevent voltage drops, they are generally big capacitance and placed around the power supply.
In fact, the difference between decoupling, bypass and bulk capacitor is not clear, all are used to stabilize voltage. Roughly bulk capacitors have bigger capacitance and provides mor current for a longer period (filter lower frequencies).
In addition, for power supplies, these capacitors play two others major roles:
- Filter noise from the power supply itself, especially SMPS, and noise replicated from the power source.
- Power supply has feedback loops regulations that needs capacitors to reman stable and accurate.
It is important to respect power supplies datasheets recommendations about capacitors values.
In conclusion capacitors play important roles in supply path. It is important to pay attention to decoupling and PCB layout. Due to parasitic inductances in lines and capacitors and variety of frequencies to filter, one big capacitor is not equivalent to properly sized one’s placed at different places of the circuit.
Each component datasheet provides recommendations.
1.3.2. Over current protection
Most simple power supplies do not have any current management. In the case of short circuit or low impedance load, this can lead to destructive current for the power supply or the load. Furthermore, in some cases there are current limitations from the power source. To avoid risks it is recommended to choose a power supply with a current protection feature.
- Over current cut off
A simple solution is monitoring the current and cutting power supply when it reaches the limit. It is a simple and efficient solution, however if threshold is too low, it can be triggered by current spike like inrush current.
- Current limiting
Some power supplies can limit current by lowering voltage. This protects against short circuits and can be used to limit inrush current. It has the advantage of not cut of completely in case of transient spike of current. On the other hand, this requires a good #Power supply supervisor to reset ICs when voltage is too low to prevent malfunction.
A current limiting can lead to ripple around the startup voltage of ICs. When VDD passes over POR threshold (), reset is released, and the IC starts to boot. If the current call is too high, the limiting current lowers the voltage, eventually enough to go back under PDR threshold. This can be repeated multiple times until capacitors are charged enough.
1.3.3. Soft start
Soft start is another way to control inrush current. It consists of a controlled, slow voltage rising ramp.
Example components:
- L7983 is a SMPS controller which include a soft start feature, the output voltage rises in 2 ms: DS13354 - Rev 1, ch 5.4, p17.
- LD59150 is a LDO with a programmable soft start and a power good signal: DS12455 - Rev 7, ch 6.2, p8.
1.3.4. Over voltage protection (OVLO)
Overvoltage lockout (OVLO) feature cuts output power when voltage reaches an overvoltage threshold. This prevents damaging the load in case of unexpectedly high input voltage. STBP120 is a power supervisor IC that provides multiple features including OVLO.
1.3.5. Under voltage lockout (UVLO)
Under voltage lockout consist of cutting output power when input voltage passes below a threshold. This prevents powering the load with intermediate voltage. The ST1PS03 is a buck convertor (SMPS) which include under voltage lockout.
1.3.6. Power good
Power good signal, can be provided either by the power supply itself or by a power monitor device, tells when voltage is high enough and stabilized. Is useful to keep reset an IC during supply start-up to play the role of internal #Power supply supervisor. It is also used enable another power supply to manage power one order for example (Error! Reference source not found.). For example, LDL40 and LD59150 are LDO with an integrated PG feature.
Here finds external power supervisor which implements some functionalities presented above: https://www.st.com/en/reset-and-supervisor-ics.html.
1.3.7. Power on sequence
The power on sequence is the phase while the voltage is rising, and components power on. The application is often composed of multiple ICs which might have different startup voltage and delays. It is a good option to have a quick voltage rising ramp to prevent too much delay between two components startup. It is better to start from 0V with all circuits fully discharged with no residual voltages, see power-down sequence "Power down sequence" for more information. The voltage curve should be monotonic and strictly rising.
The rise time is conditioned by the total capacitance (in Farads) of the circuit (chip + decoupling + components) as well as the impedance of the power supply Zsupply or the current limit imax.
If the inrush current is too high, the voltage may drop during rise, and not be strictly rising or the power supply can shut off if an over current protection is triggered. For more information see section #Current limiting.
1.3.8. Power down sequence
The importance of power down phase is frequently underestimated. It recommended to always keep a low impedance tied on Vdd, even for power down phase. To properly discharge all capacitance, pull Vdd to 0V with a low impedance.
There are different methods to implement proper power down.
- Passive resistor
A resistor, RD places between VDD and GND discharge capacitors when power supply is off. Discharge time last about 3*τ = 3*R*C ; R = RD and C is the sum of all decoupling/bulk capacitors. This is a low-cost solution, but it consumes power permanently: P = (Vdd^2)/RD . The lower the pull-down resistor, the quicker the discharge and higher is the consumption.
- Power monitor + Mos
This solution uses a resistor in series with a transistor controlled by a inverted power good or enable signal. Two important elements to take care:
- Ensure that Vdd rail is not powered when closing discharge switch, either by disabling the regulator or be sure that no more power source is connected. Otherwise, this lead to a huge current call.
- The discharge switch gate needs to be held above Vgs threashold until Vdd rail reaches 0V. This can be chalenging if Vin drops quickly. Consider these parameters to ensure functional circuit:
- Use a low VGS N-Channel MOSFET transistor.
- Adding capacitor in the power monitor supply domain can help to keep it powered longer.
- Use a lower resistor to discharge Vdd rail quicker.
- Set a high Vin threshold to give more time margin.
- Discreet circuit
- PS integrated discharge
The most efficient way to implement this feature, is to use a fully integrated in power supply itself. This reduces overall complexity, conception time, number of components and used space on PCB.
Some power supplies, equipped with an enable feature, has an internal switch that ties the Vout line to ground when disabled.
For example, the STLQ020 is a LDO with an optional discharge feature through a 100Ω resistor when enable signal is low.
The ST1PS03 is a buck convertor (SMPS) which include output discharge feature.
1.3.9. Components example
- ST1PS02 SMPS regulator; It is a 400-mA buck regulator:
- Adjustable output current limit
- Power good signal
- Constant current soft start
- Output discharge
- Under voltage protection
- ST1L08 LDO regulator; It is a 800-mA high PSRR linear regulator:
- Power good signal
- Current limiter
- Enable signal
- Thermal protection
- STEF05 eFuse:
- Soft start
- Output voltage clamp
- Current limiting
2. STM32
2.1. Context
STM32 microcontrollers are composed of different power domains. This has different purposes:
- Have different operating voltage.
- Have different power sources.
- Shut down some parts to reduce consumption.
- Isolate noise.
- …
Al STM32 have at least Vdd and Vdda input supplies. The main supply is called Vdd. On simplest products and/or smallest packages, this is used to supply the entire device except the analog part supplied by Vdda. Slightly more advanced products have other input power supplies dedicated to specific features.
Internally STM32 are divided into different power domains. They can be isolated by power switches or regulators. Some parts can be completely unpowered when unused.
2.2. Specific supplies configurations
2.2.1. Vcore/Vcap
Vcore supply CPU, memory, and some peripherals. This voltage is generally provided by an internal LDO. On some products, CPU voltage supply (Vcore) is externally accessible through Vcap pin, in this case there is different way to supply Vcore:
- Internal LDO
1st configuration Vcore provided by the internal LDO supplied with Vdd. This requires decoupling capacitor on Vcap.
- External regulator
It is possible to externally supply Vcore through Vcap bypassing the internal LDO as shown in the 6th configuration.
- Internal SMPS
In some devices, an internal SMPS is available. It can be used to be more efficient.
The internal SMPS can supply directly Vcore to get the best efficiency, 2nd configuration. To reduce the ripple from SMPS, supply the Internal LDO by the SMPS. The SMPS output is about 100mV above Vcore, and the LDO filters the ripple. See 3rd configuration, or use an external regulator, see 5th configuration.
2.2.2. Vdda Vref
The analog power domain is isolated from the digital power domain to reduce the impact of switching noise. Analog components such as ADC, comparators, DAC are supplied by Vdda.
For sensitive applications, Vdda can be provided by a separate power supply like a low noise and high PSRR LDO. With a separate ground plane for the whole analog section. If not possible, the minimal recommendation is to isolate Vdda from Vdd with a ferrite bead in series.
The main sensitive point regarding noise is Vref which is the voltage reference used by analog component. This means that ADC measurement accuracy and noise (SNR) directly dependent on Vref. Vref is generally accessible through Vref+ pin.
Vref can be provided in different ways.
- The simplest solution is to use Vdda. The smallest packages have Vref+ directly bounded to Vdda. Otherwise, it is possible to directly tie Vref+ and Vdda together. In this case, Vdda is more sensitive to noise and accuracy.
- Some products embed an internal bandgap reference Vrefbuf which can provide a steady voltage reference which doesn’t rely on Vdda precision and is isolated from its noise.
- Finally, it is possible to provide an external reference through Vref+ pin provided by a dedicated component.
2.3. Power consumption factors
2.3.1. CPU Mode
CPU has different modes (Run, Sleep, Stop, Low power Run ...), that consume different amounts of current (note that all features are not available in low consumption modes). See this article for more information: https://wiki.st.com/stm32mcu/wiki/Getting_started_with_PWR.
2.3.2. Peripherals
Activated peripherals consume current, unused should be unpowered to reduce overall consumption.
2.3.3. Voltage
In some products, it is possible to modify the core voltage (VCORE VOS) and peripherals voltage to modulate the current, lower the voltage is, the less it consumes. The voltage scale affects operating conditions such as CPU frequency.
2.3.4. Frequency
Digital component consumption depends on the clock frequency, higher the clock speed is, higher the current. Lowering the CPU or peripheral clock frequency helps to reduce the current consumption.
2.3.5. Temperature
Physical properties of materials, especially resistivity, are affected by temperature. Digital IC consumes significantly more at high temperatures.
2.3.6. low power
STM32 have different operating mods (run, sleep, low power sleep, stop...) that enable/disable functionalities and change operating conditions. These are used to reduce power consumption when some features are not used by the application.
Note: Keep in mind that waking up MCU from sleep or stop mods take time and consume current. It is longer to wakeup from deeper sleeping mod. Some parameters like clock frequency help to have a quicker wakeup at the price of a higher peek current.
2.4. How to estimate consumption
2.4.1. Stm32CubeMX Power Consumption Calculator (PCC)
To estimate power consumption, Stm32CUBEMX software integrate a tool called Power Consumption Calculator (PCC). This is an interesting complementary tool to the manual approach presented in this chapter. See STM32 CubeMX User manual (UM1718) chapter 13 “Using the Power Consumption Calculator to optimize the embedded application consumption and more” to learn more.
Keep in mind that Datasheet values take precedence over PCC results.
2.4.2. Configuration consumption
Each element can be configured dynamically during application execution, this modifies consumption. The first step is estimating consumption of different configurations.
The first thing to look at is the CPU consumption. Datasheet usually gives system consumption with all peripherals disabled for different mode, clock, and memory configuration. The consumption includes Clock source, program memory and CPU. Note that datasheets usually give typical and maximum values at different temperatures.
Example: STM32F405rg in run mode, executing code from Flash memory, running at 90MHz with all peripherals disabled consume 20 mA in typical conditions at 25°C:
Then look at each peripheral consumption depending on their configurations.
Example: STM32L073v8 in run mode, Range2 (Vcore = 1,5V), FHCL = 16MHz, FAPB2= 8MHz, the USART1 consume 11.5 µA/MHz so: 92µA in typical conditions:
The total consumption is the sum of all component’s consumption. As generally CPU value is given for the whole MCU except peripherals, add to this each activated peripherals consumption.
2.4.3. Average current
To calculate the average current, sum consumption of CPU for each configuration pondered with time ratio spend in it add to that consumption of each peripheral at given configuration pondered with use time ratio. The average current gives a long theme consumption, it relevant to estimate energy consumption and size a finite energy source like a battery.
Iavg = ∑ [ (CPU+Clock+Memory) * usage ratio ] +∑ [ Peripheral consuption * usage ratio ]
2.4.4. Maximum continuous current
Take the configuration that consumes the most in application conditions. This value must be lower than the maximum continuous current characteristic of the power supply.
2.4.5. Peak current
- Inrush
One of the main sources of peak current is inrush during power up. Supply voltage rise charge capacitors of the circuit and startup of ICs draws current. This represents a significative amount of energy.
The inrush current might be much higher than other currents spikes in operating conditions. To reduce the size of the power supply, it is possible to control inrush, either using a current limiting feature in the power supply or soft start, see #Soft start section for more information.
Three elements are related, total capacitance, rising time and peek current. Always remember that tuning one affects the others.
Note: This topic is related to rising time, see #Power on sequence section. The faster the voltage rises, the higher the current is. irush = Ceq*dVdd/dt
dVdd/dt is the rising rate, Ceq equivalent capacitance of the system, sum of all decoupling/bulk capacitor, capacitance of the different components/chip.
- Mode transition
Transitioning between different run modes, low power modes, clock frequency, voltage ranges induce transient current that might be significative for sensitive applications.
2.5. Decoupling
It is recommended to put one small capacitor for each power supply pin, and some bigger for the whole circuit. When there is multiple power domain decoupling is needed for each one. In any case refer to the “Power supply scheme” figure int device Datasheet. When Vcap is available, decoupling capacitors need to be attached as close as possible to VCAP pins.
Here is the example of the STM32 L0:
- PCB recommendations
The PCB layout play an important role in the quality of decoupling, refer to the Getting started application note, dedicated to your device, to get precises guidelines.
2.6. Power supply supervisor
this chapter is mainly a copy of the chapter 2.2 of the application note : AN5307 - Rev 6, ch 2.2
To ensure that that the MCU does not run under the minimum operating voltage, STM32 devices have integrated voltage monitoring circuitry.
2.6.1. Power-on reset (POR)/power-down reset (PDR)
The device remains in reset mode while VDD is below a specified threshold, VPOR/PDR, generally around 1.7V-1.8V. For more details concerning tRSTTEMPO and VPOR/VPDR threshold value refer to the “electrical characteristics” and “reset and power control block characteristics table” in the mcu datasheet.
On some devices the PDRON pin is available. In this case the power supply supervisor is enabled by holding PDRON high and can be disabled by pulling down PDRON. Otherwise, if not available the power supply supervisor is always enabled.
If power supply supervisor is disabled, an external power supply supervisor must monitor VDD and control the NRST pin. The device must be maintained in reset mode as long as VDD is below the minimum operating voltage specified in the datasheet. .
The supply ranges which never go below VPOR/PDR are managed more effectively using the internal circuitry (no additional components are needed, thanks to the fully embedded reset controller). When the embedded power supply supervisor is off, the following integrated features are no longer supported:
- the integrated power-on reset (POR) / power-down reset (PDR) circuitry is disabled.
- the brown out reset (BOR) circuitry must be disabled.
- the embedded programmable voltage detector (PVD) is disabled.
- VBAT functionality is no longer available and VBAT pin must be connected to VDD.
2.6.2. Brownout reset (BOR)
The BOR keeps the system under reset until the VDD supply voltage reaches the selected VBOR threshold.
BOR is enabled through the option bytes, as well as VBOR threshold. Different BOR levels are available depending on the device. It is used to set a higher threshold than VPOR and can be modified dynamically, see the device reference manual or datasheet for more information.
2.6.3. Programmable voltage detector (PVD)
The PVD is an additional voltage monitoring system. It sets a flag that tells if VDD is above or below the selected threshold. PVD is activated and the threshold VPVD selected through registers, see the device reference manual or datasheet for more information.
It can be connected to the EXTI to trigger interruption when VDD drops below the selected threshold or rise above the threshold. As an example, the service routine could perform emergency shutdown tasks such as saving data in backup domain.
Analog voltage detector (AVD) The AVD can be used to monitor VDDA power supply like the PVD.
2.6.4. System reset
A system reset sets all the registers to their default values except the reset flags in the clock controller RCCRSR register and the registers in the backup domain. A system reset is generated when one of the following events occurs:
- A low level on the NRST pin (external reset)
- Window watchdog end of count condition (WWDG reset)
- Independent watchdog end of count condition (IWDG reset)
- A software reset (Software reset)
- A low-power management reset.
2.7. Multiple power supplies rules
2.7.1. Voltage differences
Different power domains have constraints about voltage differences. The datasheet might specify that one needs to be higher than the second one, or the voltage difference might not exceed a certain value. For example, VDDA vs VDDX for STM32L0:
Here VDDx vs VDD for STM32U5:
2.7.2. Circuit exemples
A simple way to ensure that a supply voltage Vddx doesn’t rise before Vdd, is to wire power good signal from Vdd regulator to enable signal of Vddx regulator as shown in Figure below Sequencing power rails, chained regulators.
Also be sure that Vddx regulators has proper discharge feature to prevent any Vddx staying above Vdd during power down phase.
In Figure below delayed Vddusb5 graph, an example of Figure 30 applied on Vdd5USB. Se during power down phase Vdd5USB must discharge fast enough to reach 1V before Vdd.
