View source for GIC internal peripheral

==Article purpose==
The purpose of this article is to
* briefly introduce the '''GIC''' peripheral (generic interrupt controller) and its main features
* indicate the level of security supported by this hardware block
* explain how each instance can be allocated to the three runtime contexts and linked to the corresponding software components
* explain, when needed, how to configure the GIC peripheral.

==Peripheral overview==
The '''GIC''' peripheral is the Arm<sup>&reg;</sup> Cortex<sup>&reg;</sup>-A7 interrupt controller. It is consequently not accessible from the Arm<sup>&reg;</sup> Cortex<sup>&reg;</sup>-M4 core.<br />

===Features===
Refer to [[STM32MP15 resources#Reference manuals|STM32MP15 reference manuals]] for the complete list of features, and to the software components, introduced below, to know which features are really implemented.<br>

===Security support===
The GIC is a '''secure''' peripheral (under [[ETZPC_internal_peripheral|ETZPC]] control).

==Peripheral usage and associated software==
===Boot time===
The GIC is configured by the FSBL (see [[Boot chain overview]]), mainly to define the routing of each interrupt to the secure or non-secure context at runtime.

===Runtime===
====Overview====
The GIC can be allocated:
* to the Arm<sup>&reg;</sup> Cortex<sup>&reg;</sup>-A7 secure core to be used under OP-TEE with the GIC [[OP-TEE overview|OP-TEE]] driver (or [[TF-A overview|TF-A]] secure monitor if the OP-TEE is not present)
* or to the Arm<sup>&reg;</sup> Cortex<sup>&reg;</sup>-A7 non-secure core to be used under Linux<sup>&reg;</sup> with the [[Interrupt overview|interrupts]] framework

====Software frameworks====
{{:Internal_peripherals_software_table_template}}
 | Core/Interrupts
 | [[GIC internal peripheral|GIC]]
 | [[OP-TEE_overview|OP-TEE GIC driver]]
 | [[Interrupt overview|Linux interrupt framework]]
 | 
 |
 |-
 |}

====Peripheral configuration====
The configuration is applied by the firmware running in the context to which the peripheral is assigned. The configuration by itself can be performed via the [[STM32CubeMX]] tool for all internal peripherals. It can then be manually completed (especially for external peripherals) according to the information given in the corresponding software framework article.

====Peripheral assignment====
{{:Internal_peripherals_assignment_table_template}}
<onlyinclude>
 | rowspan="1" | Core/Interrupts
 | rowspan="1" | [[GIC internal peripheral|GIC]]
 | GIC
 | <span title="system peripheral" style="font-size:21px">✓</span>
 | <span title="system peripheral" style="font-size:21px">✓</span>
 |
 |
 |-
</onlyinclude>
 |}

<noinclude>
[[Category:Interrupts peripherals]]
{{PublicationRequestId | 8313 | 2018-08-02 | AnneJ}}
{{ArticleBasedOnModel| Internal peripheral article model}}
{{ReviewsComments|JCT 1840: alignment needed with the last version of the model [[Contributors:Internal peripheral article model]]<br>
[[Category:ToBeAlignedWithModel]]
}}
</noinclude>