STM32MP15 ecosystem errata sheet

Revision as of 14:52, 19 February 2019 by Registered User (→‎New proposal)

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1. New proposal[edit source]

The STM32MP15xx device errata document[1] lists and explains the different device errata and explains associated workaround (SW and/or HW) if any.

This article aims to describe which workarounds are implemented in STM32MP15-Ecosystem-v1.0.0 release, among the ones proposed in STM32MP15xx device errata [1].

Here is the legend for the column "Status STM32MP15xx Rev.B" in the table below, which refer to the availability of a workaround for the described errata:

  • A = workaround available
  • P = partial workaround available

Here is the legend for the column "STM32MP15-Ecosystem-v1.0.0 Status" in the table below, which refer to the availability of a workaround in the STM32MP15-Ecosystem-v1.0.0 release:

  • I = workaround Implemented
  • P = workaround Partialy implemented
  • N= workaround Not implemented

Fly over the letters in the columns to show legend locally.


Function Section Limitation Status
STM32MP15xx Rev.B
Status
STM32MP15-Ecosystem-v1.0.0
Workaround implemented in STM32MP15 ecosystem
Arm Cortex-A7 core 2.1.1 Memory locations might be accessed speculatively due to instruction fetches when HCR.VM is set A N Workaround not implemented: STM32MPU Embedded Software distribution does not activate Cortex-A7 hypervisor mode and so Virtual Memory second stage of translation.

It is customer responsibility to implement the workaround if hypervisor mode used in its product.

2.1.2 Cache maintenance by set/way operations can execute out of order A N No workaround implemented
2.1.4 PMU event counter 0x14 does not increment correctly A N No workaround implemented
Arm Cortex-M4 core 2.2.1 Interrupted loads to SP can cause erroneous behavior A N No workaround implemented
2.2.2 VDIV or VSQRT instructions might not complete correctly when very short ISRs are used A N VDIV and VSQRT instructions are not used in STM32CubeMP1 Package
2.2.3 Store immediate overlapping exception return operation might vector to incorrect interrupt A A No workaround implemented
System 2.3.1 TPIU fails to output sync after the pattern generator is disabled in Normal mode A A No workaround implemented
2.3.3 HSE external oscillator required in some LTDC use cases P A External oscillator implemented on STM32MP157C-EV1 MB1263 Rev.C (aka "MB1263C") and STM32MP157X-DKX MB1272 Rev.C (aka "MB1272C")
2.3.4 RCC cannot exit Stop and LP-Stop modes A A Workaround implemented in TF-A plat/st/stm32mp1/bl2_plat_setup.c#L279
2.3.5 Incorrect reset of glitch-free kernel clock switch P A STPMIC1 performs a VDDCORE reset on NRST activation, by default
2.3.6 Limitation of aclk/hclk5/hclk6 to 200 MHz when used as SDMMC1/2 kernel clock P A Workaround implemented in TF-A fdts with a clock tree that uses a kernel clock source that is not the bus clock
DDRPHYC 2.4.1 DDRPHYC overconsumption upon reset or Standby mode exit A A No workaround implemented
DMAMUX 2.5.4 Wrong input DMA request routed upon specific DMAMUX_CxCR register write coinciding with synchronization event A A Synchronization mode not used in OpenSTLinux distribution.

No workaround implemented in STM32CubeMP1 Package.

QUADSPI 2.6.1 Memory-mapped read of last memory byte fails P A Workaround implemented in OpenSTLinux distribution drivers/spi/spi-stm32-qspi.c#L452
ADC 2.7.1 ADC ANA0/ANA1 resolution limited when Gigabit Ethernet is used P A No workaround implemented
2.7.2 ADC missing codes in differential 16-bit static acquisition P A No workaround implemented
DTS 2.8.1 Mode using PCLK & LSE (REFCLK_SEL = 1) should not be used P A Workaround implemented in OpenSTLinux distribution drivers/thermal/st/stm_thermal.c#L215
TIM 2.10.1 One-pulse mode trigger not detected in master-slave reset + trigger configuration P A No workaround implemented
LPTIM 2.11.1 MCU may remain stuck in LPTIM interrupt when entering Stop mode A A Interrupt not used in OpenSTLinux distribution.

No workaround implemented in STM32CubeMP1 Package.

2.11.2 MCU may remain stuck in LPTIM interrupt when clearing event flag P A Interrupt not used in OpenSTLinux distribution. Workaround implemented in STM32CubeMP1 Package Drivers/STM32MP1xx_HAL_Driver/Src/stm32mp1xx_hal_lptim.c#L1413
RTC and TAMP 2.12.2 Calendar initialization may fail in case of consecutive INIT mode entry A A Workaround implemented in OpenSTLinux distribution drivers/rtc/rtc-stm32.c#L276
I2C 2.13.1 Wrong data sampling when data setup time (tSU;DAT) is shorter than one I2C kernel clock period P A Workaround implemented in TF-A fdts with a clock tree that uses a kernel clock source that is greater than 20MHz
2.13.2 Spurious bus error detection in master mode A A No workaround implemented
2.13.3 Spurious master transfer upon own slave address match P A No workaround implemented
SPI 2.14.1 Master data transfer stall at system clock much faster than SCK A A SPI is disabled after each EOT in OpenSTLinux distribution drivers/spi/spi-stm32.c .
2.14.2 Corrupted CRC return at non-zero UDRDET setting P A Slave mode & CRC not supported in OpenSTLinux distribution.
2.14.3 TXP interrupt occurring while SPI disabled A A The driver ensures that all interrupts are disabled before the SPI is disabled in OpenSTLinux distribution drivers/spi/spi-stm32.c .
ETH 2.15.2 Rx DMA may fail to recover upon DMA restart following a bus error, with Rx timestamping enabled A A No workaround implemented
2.15.3 Tx DMA may halt while fetching TSO header under specific conditions A A No workaround implemented
2.15.4 Spurious receive watchdog timeout interrupt A A No workaround implemented
2.15.5 Incorrect flexible PPS output interval under specific conditions A A No workaround implemented
2.15.6 Packets dropped in RMII 10Mbps mode due to fake dribble and CRC error A A No workaround implemented
2.15.7 ARP offload function not effective A A ARP is disabled in OpenSTLinux distribution.

2. Old proposal[edit source]

This article aims to describe what workarounds are implemented in STM32MP15-Ecosystem-v1.0.0 release, among the ones proposed in STM32MP15xx device errata [2].


Here is the legend for the column "Status" in the table below:

  • A = workaround available
  • N = no workaround available
  • P = partial workaround available

Fly over the letters in the column to show it locally.


Function Section Limitation Status
Rev.B
Workaround implemented in STM32MP15 ecosystem
Arm Cortex-A7 core 2.1.1 Memory locations might be accessed speculatively due to instruction fetches when HCR.VM is set A No workaround implemented: STM32MPU Embedded Software distribution does not include any hypervisor, so this errata is not applicable
2.1.2 Cache maintenance by set/way operations can execute out of order A No workaround implemented
2.1.3 PMU events 0x07, 0x0C, and 0x0E do not increment correctly N None
2.1.4 PMU event counter 0x14 does not increment correctly A No workaround implemented
2.1.5 Exception mask bits are cleared when an exception is taken in Hyp mode N None: STM32MPU Embedded Software distribution does not include any hypervisor, so this errata is not applicable
Arm Cortex-M4 core 2.2.1 Interrupted loads to SP can cause erroneous behavior A No workaround implemented
2.2.2 VDIV or VSQRT instructions might not complete correctly when very short ISRs are used A No workaround implemented: those instructions are not used in STM32CubeMP1 Package
2.2.3 Store immediate overlapping exception return operation might vector to incorrect interrupt A No workaround implemented
System 2.3.1 TPIU fails to output sync after the pattern generator is disabled in Normal mode A No workaround implemented
2.3.2 Serial-wire multi-drop debug not supported N None
2.3.3 HSE external oscillator required in some LTDC use cases P External oscillator implemented on STM32MP157C-EV1 MB1263 Rev.C (aka "MB1263C") and STM32MP157X-DKX MB1272 Rev.C (aka "MB1272C")
2.3.4 RCC cannot exit Stop and LP-Stop modes A Workaround implemented in TF-A plat/st/stm32mp1/bl2_plat_setup.c#L279
2.3.5 Incorrect reset of glitch-free kernel clock switch P STPMIC1 performs a VDDCORE reset on NRST activation, by default
2.3.6 Limitation of aclk/hclk5/hclk6 to 200 MHz when used as SDMMC1/2 kernel clock P Workaround implemented in TF-A fdts with a clock tree that uses a kernel clock source that is not the bus clock
DDRPHYC 2.4.1 DDRPHYC overconsumption upon reset or Standby mode exit A No workaround implemented
DMAMUX 2.5.1 SOFx not asserted when writing into DMAMUX_CFR register N Synchronization mode not used in OpenSTLinux distribution.

None in STM32CubeMP1 Package.

2.5.2 OFx not asserted for trigger event coinciding with last DMAMUX request N Trigger inputs not used in OpenSTLinux distribution.

None in STM32CubeMP1 Package.

2.5.3 OFx not asserted when writing into DMAMUX_RGCFR register N Trigger inputs (and so, request generator) not used in OpenSTLinux distribution.

None in STM32CubeMP1 Package.

2.5.4 Wrong input DMA request routed upon specific DMAMUX_CxCR register write coinciding with synchronization event A Synchronization mode not used in OpenSTLinux distribution.

No workaround implemented in STM32CubeMP1 Package.

QUADSPI 2.6.1 Memory-mapped read of last memory byte fails P Workaround implemented in OpenSTLinux distribution drivers/spi/spi-stm32-qspi.c#L452
ADC 2.7.1 ADC ANA0/ANA1 resolution limited when Gigabit Ethernet is used P No workaround implemented
2.7.2 ADC missing codes in differential 16-bit static acquisition P No workaround implemented
DTS 2.8.1 Mode using PCLK & LSE (REFCLK_SEL = 1) should not be used P Workaround implemented in OpenSTLinux distribution drivers/thermal/st/stm_thermal.c#L215
DSI 2.9.1 DSI PHY compliant with MIPI DPHY v0.81 specification, not with DSI PHY v1.0 N No workaround implemented
TIM 2.10.1 One-pulse mode trigger not detected in master-slave reset + trigger configuration P No workaround implemented
LPTIM 2.11.1 MCU may remain stuck in LPTIM interrupt when entering Stop mode A Interrupt not used in OpenSTLinux distribution.

No workaround implemented in STM32CubeMP1 Package.

2.11.2 MCU may remain stuck in LPTIM interrupt when clearing event flag P Interrupt not used in OpenSTLinux distribution. Workaround implemented in STM32CubeMP1 Package Drivers/STM32MP1xx_HAL_Driver/Src/stm32mp1xx_hal_lptim.c#L1413
RTC and TAMP 2.12.1 Incorrect version register N None
2.12.2 Calendar initialization may fail in case of consecutive INIT mode entry A Workaround implemented in OpenSTLinux distribution drivers/rtc/rtc-stm32.c#L276
2.12.3 Alarm flag may be repeatedly set when the core is stopped in debug N None. OpenSTLinux distribution does not use the subsecond features.
I2C 2.13.1 Wrong data sampling when data setup time (tSU;DAT) is shorter than one I2C kernel clock period P Workaround implemented in TF-A fdts with a clock tree that uses a kernel clock source that is greater than 20MHz
2.13.2 Spurious bus error detection in master mode A No workaround implemented
2.13.3 Spurious master transfer upon own slave address match P No workaround implemented
SPI 2.14.1 Master data transfer stall at system clock much faster than SCK A SPI is disabled after each EOT in OpenSTLinux distribution drivers/spi/spi-stm32.c .
2.14.2 Corrupted CRC return at non-zero UDRDET setting P Slave mode & CRC not supported in OpenSTLinux distribution.
2.14.3 TXP interrupt occurring while SPI disabled A The driver ensures that all interrupts are disabled before the SPI is disabled in OpenSTLinux distribution drivers/spi/spi-stm32.c .
ETH 2.15.1 Incorrect L4 inverse filtering results for corrupted packets N None
2.15.2 Rx DMA may fail to recover upon DMA restart following a bus error, with Rx timestamping enabled A No workaround implemented
2.15.3 Tx DMA may halt while fetching TSO header under specific conditions A No workaround implemented
2.15.4 Spurious receive watchdog timeout interrupt A No workaround implemented
2.15.5 Incorrect flexible PPS output interval under specific conditions A No workaround implemented
2.15.6 Packets dropped in RMII 10Mbps mode due to fake dribble and CRC error A No workaround implemented
2.15.7 ARP offload function not effective A ARP is disabled in OpenSTLinux distribution.

3. References[edit source]