1. Article purpose[edit source]
The purpose of this article is to:
- briefly introduce the CRYP peripheral and its main features
- indicate the level of security supported by this hardware block
- explain how each instance can be allocated to the three runtime contexts and linked to the corresponding software components
- explain how to configure the CRYP peripheral.
2. Peripheral overview[edit source]
The CRYP peripheral provides hardware acceleration to encrypt or decrypt data using the DES[1], TDES[2] or AES[3] algorithms. It also supports multiple key sizes and chaining modes.
2.1. Features[edit source]
Refer to STM32MP15 reference manuals for the complete list of features, and to the software components, introduced below, to know which features are really implemented.
2.2. Security support[edit source]
CRYP1 is a secure peripheral (under ETZPC control).
CRYP2 is a non secure peripheral.
3. Peripheral usage and associated software[edit source]
3.1. Boot time[edit source]
CRYP1 is not used during boot process.
3.2. Runtime[edit source]
CRYP1 instance can be allocated to:
- the Arm® Cortex®-A7 secure core to be controlled in OP-TEE by the CRYP OP-TEE driver
or
- The Arm® Cortex® -A7 non-secure for using in Linux® with Linux Crypto framework
CRYP2 instance can be allocated to:
- the Arm® Cortex®-M4 to be controlled in STM32Cube MPU Package by STM32Cube CRYP driver
Chapter Peripheral assignment describes which peripheral instance can be assigned to which context.
3.2.1. Software frameworks[edit source]
| Domain | Peripheral | Software frameworks | Comment | ||
|---|---|---|---|---|---|
| Cortex-A7 secure (OP-TEE) |
Cortex-A7 non-secure (Linux) |
Cortex-M4 (STM32Cube) | |||
| Security | CRYP | CRYP OP-TEE driver | Linux Crypto framework | STM32Cube CRYP driver | |
3.2.2. Peripheral configuration[edit source]
The configuration is applied by the firmware running in the context to which the peripheral is assigned. The configuration can be done alone via the STM32CubeMX tool for all internal peripherals, and then manually completed (particularly for external peripherals), according to the information given in the corresponding software framework article.
3.2.3. Peripheral assignment[edit source]
Check boxes illustrate the possible peripheral allocations supported by STM32 MPU Embedded Software:
- ☐ means that the peripheral can be assigned (☑) to the given runtime context.
- ✓ is used for system peripherals that cannot be unchecked because they are statically connected in the device.
Refer to How to assign an internal peripheral to a runtime context for more information on how to assign peripherals manually or via STM32CubeMX.
The present chapter describes STMicroelectronics recommendations or choice of implementation. Additional possiblities might be described in STM32MP15 reference manuals.
| Domain | Peripheral | Runtime allocation | Comment | |||
|---|---|---|---|---|---|---|
| Instance | Cortex-A7 secure (OP-TEE) |
Cortex-A7 non-secure (Linux) |
Cortex-M4 (STM32Cube) | |||
| Security | CRYP | CRYP1 | ☐ | ☐ | Assignment (single choice) | |
| CRYP2 | ☐ | |||||
4. How to go further[edit source]
Not applicable.
5. References[edit source]