TSGEN internal peripheral

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1. Article purpose[edit source]

The purpose of this article is to:

briefly introduce the TSGEN peripheral and its main features
indicate the level of security supported by this hardware block
explain how each instance can be allocated to the three runtime contexts and linked to the corresponding software components
explain, when necessary, how to configure the TSGEN peripheral.

2. Peripheral overview[edit source]

The TSGEN peripheral generates a universal reference in time, named timestamps, and sends it to the Coresight source peripherals (such as STM and ETM internal peripherals). Source peripherals use then this reference to integrate it in the instruction trace generated. Since multiple trace generators can be implemented in a Coresight system, timestamp allows to order traces chronologically.

2.1. Features[edit source]

Refer to the STM32MP15 reference manuals for the complete list of features, and to the software components, introduced below, to see which features are really implemented.

2.2. Security support[edit source]

The TSGEN is a non secure peripheral.

3. Peripheral usage and associated software[edit source]

3.1. Boot time[edit source]

The TSGEN is not used at boot time.

3.2. Runtime[edit source]

3.2.1. Overview[edit source]

The TSGEN can be assigned to the Cortex^®-A7 non-secure for using in Linux with coresight framework.
Although there is no dedicated driver to manage this peripheral, ETM driver includes TSGEN peripheral and enables it in order to log timestamp packets in the instruction trace.

3.2.2. Software frameworks[edit source]

Internal peripherals software table template

| Trace & Debug
| TSGEN
| 
| Linux Coresight framework
| 
|
|-
|}

3.2.3. Peripheral configuration[edit source]

The configuration is applied by the firmware running in the context to which the peripheral is assigned. The configuration can be done alone via the STM32CubeMX tool for all internal peripherals, and then manually completed (particularly for external peripherals), according to the information given in the corresponding software framework article.

3.2.4. Peripheral assignment[edit source]

Internal peripherals assignment table template

| rowspan="1" | Trace & Debug
| rowspan="1" | TSGEN
| TSGEN
|
| ✓
|
|
|-

|}