1. Article purpose[edit source]
The purpose of this article is to:
- briefly introduce the NVIC and its main features
- indicate the level of security supported by this hardware block
- explain how the NVIC can be configured.
2. Peripheral overview[edit source]
The NVIC is the Arm® Cortex®-M4 interrupt controller. As a result, it cannot be accessed by the Arm Cortex-A7 core.
2.1. Features[edit source]
Refer to STM32MP15 reference manuals for the complete list of features, and to the software components, introduced below, to see which features are implemented.
2.2. Security support[edit source]
The NVIC is a non-secure peripheral.
3. Peripheral usage and associated software[edit source]
3.1. Boot time[edit source]
The NVIC can be configured through the STM32Cube.
3.2. Runtime[edit source]
3.2.1. Overview[edit source]
The NVIC can be allocated only to the Arm Cortex-M4 core to be controlled in the STM32Cube by the NVIC HAL driver.
3.2.2. Software frameworks[edit source]
Internal peripherals software table template
| Core/Interrupts | NVIC | | | STM32Cube NVIC driver | |- |}
3.2.3. Peripheral configuration[edit source]
The configuration is applied by the firmware running in the context to which the peripheral is assigned. The configuration can be done alone via the STM32CubeMX tool for all internal peripherals, and then manually completed (particularly for external peripherals), according to the information given in the corresponding software framework article.
3.2.4. Peripheral assignment[edit source]
Internal peripherals assignment table template
| rowspan="1" | Core/Interrupts | rowspan="1" | NVIC | NVIC | | | ✓ | |-
|}
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