1. Article purpose
The purpose of this article is to:
- briefly introduce the TSGEN peripheral and its main features
- indicate the level of security supported by this hardware block
- explain how each instance can be allocated to the three runtime contexts and linked to the corresponding software components
- explain, when necessary, how to configure the TSGEN peripheral.
2. Peripheral overview
The TSGEN peripheral generates a universal reference in time, named timestamps, and sends it to the CoreSight™ source peripherals (such as STM and ETM internal peripherals). Source peripherals use then this reference to integrate it in the instruction trace generated. Since multiple trace generators can be implemented in a CoreSight system, timestamp allows to order traces chronologically.
2.1. Features
Refer to the STM32MP15 reference manuals for the complete list of features, and to the software components, introduced below, to see which features are really implemented.
2.2. Security support
The TSGEN is a non secure peripheral.
3. Peripheral usage and associated software
3.1. Boot time
The TSGEN is not used at boot time.
3.2. Runtime
3.2.1. Overview
There is no dedicated driver to manage this peripheral, ETM driver includes TSGEN peripheral management and enables it in order to log timestamp packets in the instruction trace.
3.2.2. Software frameworks
Internal peripherals software table template
| Trace & Debug | TSGEN | | | | |- |}
3.2.3. Peripheral configuration
The configuration is applied by the firmware running in the context to which the peripheral is assigned. The configuration can be done alone via the STM32CubeMX tool for all internal peripherals, and then manually completed (particularly for external peripherals), according to the information given in the corresponding software framework article.
3.2.4. Peripheral assignment
Internal peripherals assignment table template
| rowspan="1" | Trace & Debug | rowspan="1" | TSGEN | TSGEN | | ☐ | | |-
|}
4. References