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Secure context isolation

Applicable for STM32MP13x lines, STM32MP15x lines, STM32MP21x lines, STM32MP23x lines, STM32MP25x lines

The STM32 MPUs include set of hardware mechanisms to secure the running software. Depending on the STM32 Arm® Cortex® MPUs More info.png family, different isolation management options are available.

The following articles focus on the specific management of isolation mechanism per topology:

Some more complex peripherals directly include security management within its own registers to handle isolation level. The secure configuration depends on the global topology used on the MPU family. It is the case for: