Registered User |
Registered User |
(One intermediate revision by one other user not shown) |
Line 1: |
Line 1: |
| <noinclude>{{ApplicableFor
| | #REDIRECT [[STM32CubeMP15 Package release note - v1.6.0]] |
| |MPUs list=STM32MP15x
| |
| |MPUs checklist=STM32MP13x, STM32MP15x
| |
| }}</noinclude>
| |
| This article aims to describe the content of the '''software''' release included in the [[STM32CubeMP1 Package|STM32CubeMP1 Package]], version '''v1.6.0'''.
| |
| | |
| <noinclude>
| |
| {{ReviewsComments|-- [[User:Nathalie Sangouard|Nathalie Sangouard]] ([[User talk:Nathalie Sangouard|talk]]) 10:07, 17 November 2021 (CET)<br />Chapters names should be modified to fit more the ecosystem release article release note (and others), this could be done after the DV4.0}}
| |
| {{ReviewsComments|-- [[User:Nathalie Sangouard|Nathalie Sangouard]] ([[User talk:Nathalie Sangouard|talk]]) 17:36, 23 June 2022 (CEST)<br />To be reviewed by TW after being approved for v4, please launch the TW review with me as TW after its publication}}
| |
| </noinclude>
| |
| | |
| ==Delivery purpose and scope ==
| |
| The '''STM32CubeMP1 Package''' is a software package running on '''Arm<sup>®</sup> Cortex<sup>®</sup>-M4''' processors and is a fundamental part of the [[:Category:STM32MPU_Embedded_Software_distribution|STM32MPU Embedded Software distribution]].
| |
| | |
| This release includes:
| |
| :*The STM32Cube HAL: STM32 abstraction layer embedded software ensuring maximized portability across the STM32 portfolio. HAL APIs are available for all peripherals.
| |
| :*Low-layer APIs (LL APIs) offering a fast lightweight expert-oriented layer that is closer to the hardware than the HAL.<br> LL APIs are only available for a limited set of peripherals.
| |
| :*A consistent set of middleware components such as FreeRTOS<sup>TM</sup> and OpenAMP.
| |
| :*All embedded software utilities delivered with a full set of examples.
| |
| | |
| It also includes:
| |
| :*BSP for the {{Board | type=157x-EV1 }} and the {{Board | type=157x-DK2}} (button and LEDs only)
| |
| :* Multi-core components
| |
| ::* OpenAMP
| |
| ::* ResourceManager
| |
| ::* CoproSync
| |
| :* Projects: several projects ( examples, applications and demonstration firmware) are implemented in different IDEs.
| |
| ::* '''STM32CubeIDE''' IDE delivered by ST
| |
| :::* All the {{Board | type=157C-DK2|name=short}} and {{Board | type=157C-EV1|name=short}} projects are available on STM32CubeIDE.
| |
| ::* '''EWARM''' (version 8.32.3 and laters)
| |
| :::* Most of the {{Board | type=157C-DK2|name=short}} projects are ported on EWARM.
| |
| ::* '''MDK-ARM''' (Pack Keil<sup>®</sup>.STM32MP1xx_DFP.1.1.0.pack + MDK-ARM 5.27 and laters)
| |
| :::* Most of the {{Board | type=157C-DK2|name=short}} projects are ported on MDK-ARM.
| |
| ::*System Workbench for STM32 toolchain ('''SW4STM32'''): now {{Highlight |deprecated}}
| |
| :::* This IDE is no longer supported by '''STMicroelectronics''', the reference is now STM32CubeIDE.
| |
| :::* '''All the SW4STM32 projects are removed''' from this release but these projects were already ported on [[STM32CubeIDE]].
| |
| | |
| ==Supported devices==
| |
| | |
| The drivers provided within this package support all {{MicroprocessorDevice | device=15}}.<br>
| |
| {{ReviewsComments|-- [[User:Nathalie Sangouard|Nathalie Sangouard]] ([[User talk:Nathalie Sangouard|talk]]) 17:28, 23 June 2022 (CEST)<br />what is the purpose to add this line below? Supported hardware are given in next chapter}}
| |
| More details are provided in the article [[STM32 MPU ecosystem release note#Boards]].
| |
| | |
| ==Supported hardware==
| |
| The software examples delivered in this package are applicable for the following boards:
| |
| * {{Board | type=157C-EV1 }}. <br>For information about this board, read the article [[STM32MP157x-EV1 - hardware description]].
| |
| * {{Board | type=157C-DK2}}. <br>For information about this board, read the article [[STM32MP157x-DKx - hardware description]].
| |
| | |
| ==Main restrictions==
| |
| :* '''OpenAMP compilation issue with MDK-ARM when the code is generated through the STM32CubeMx''':
| |
| ::* To avoid compilation errors in OpenAMP when compiling in MDK-ARM IDE, disable the « Use MicroLIB » in « Target » tab.<br>
| |
| | |
| ==Release content==
| |
| | |
| ===Main changes===
| |
| * '''HAL and LL drivers'''
| |
| ** '''HAL Generic'''
| |
| *** Implement HAL_GetUIDw{0,1,2} (New API)
| |
| *** Add ALIGN_32BYTES definitions
| |
| ** '''ADC (No API change)'''
| |
| *** Fix loop index computation at low frequency
| |
| *** Fix HAL_GetTick() timeout vulnerability
| |
| *** Fix HAL_ADC_MspDeInit: disable clock should not reset all ADCs
| |
| *** Update function parameters pointers with prefix “p”
| |
| ** '''SPI'''
| |
| *** Alignment with other STM32 families (No API Change)
| |
| ** '''TIM'''
| |
| *** LL : ONEPULSEMODE defines description are inverted
| |
| *** LL : COUNTERMODE defines are inverted for TIM_CR1_CMS
| |
| ** '''CRC, DMA and USART'''
| |
| *** Alignment with other STM32 families (No API Change)
| |
| ** '''EXTI (No API change)'''
| |
| *** Fix some MISRA warnings
| |
| *** Optimize Get Config API
| |
| ** '''SMBUS'''
| |
| *** Alignment with other STM32 families
| |
| *** SMBUS Extended files support (API Change)
| |
| ** '''QSPI (No API change)'''
| |
| *** Fix typo comments
| |
| *** Fix error for HAL_QSPI_Abort function in memory-mapped mode
| |
| ** '''RCC (No API change)'''
| |
| *** (HAL) : Fix pllxvco calculation
| |
| *** (LL) : Fix compilation issue ( some missing register alignement with CMSIS Device)
| |
| | |
| * '''CMSIS'''
| |
| ** Update bit definition in header files:
| |
| *** BSEC : Add missing registers
| |
| *** ETH : Update bitfield names
| |
| ** Update License declaration for startup and linker files
| |
| ** Change include in system file ( alignment with other STM32 families)
| |
| | |
| * '''OPENAMP'''
| |
| ** New version V2021.10
| |
| | |
| * '''PROJECTS'''
| |
| ** '''Examples'''
| |
| ***Implement new examples for STM32MP15 EVAL Board :
| |
| **** Implement ADC_MultiChannelSingleConversion example,
| |
| **** Implement ADC AnalogWatchdog example,
| |
| **** Implement ADC Oversampler example,
| |
| **** Implement LPTIM_PWM_LSE example,
| |
| **** Implement TIM_OnePulse example,
| |
| **** Implement TIM_PWMOutput example,
| |
| **** Implement TIM_Synchronization example,
| |
| **** Implement TIM_TimeBase example,
| |
| *** Update LPTIM_PulseCounter example (add low power mode)
| |
| ** '''Applications'''
| |
| *** Update project relying on OpenAMP 2021.10
| |
| *** OpenAMP_TTY_echo_wakeup example:
| |
| **** Implement the firmware shutdown to force the stop of ADC and DMA
| |
| *** Fix include declaration with gcc++ in openamp
| |
| *** Implement OpenAMP_for_signed_fw project
| |
| | |
| {{info| '''Note:''' for detailed information, read file '''Release_Notes.html''' delivered with the '''STM32CubeMP1 Package'''.}}
| |
| | |
| ===Released projects===
| |
| | |
| The '''STM32CubeMP1 Package''' comes with a rich set of examples running on '''STMicroelectronics''' boards, organized by board and provided with preconfigured projects. The main supported toolchain is '''STM32CubeIDE'''.
| |
| *Most of the {{Board | type=157C-DK2|name=short}} projects are available with 3 IDEs ( STM32CubeIDE, IAR<sup>TM</sup>, KEIL<sup>®</sup>)
| |
| *All {{Board | type=157C-EV1|name=short}} projects are available with STM32CubeIDE.
| |
| The exhaustive list of projects is provided in the table [[#Available_projects|List of Projects]].
| |
| | |
| '''IDE ready projects:'''
| |
| {|
| |
| ! !! STM32MP157C-DK2 !! STM32MP157C-EV1
| |
| |-
| |
| | Number of projects || {{Highlight|29}} || {{Highlight|38}}
| |
| |}
| |
| | |
| ===Released components===
| |
| | |
| * '''Drivers'''
| |
| {|
| |
| ! Component !! Version !! Notes
| |
| |-
| |
| | Cortex-M CMSIS || V5.6.0 || -
| |
| |-
| |
| | STM32MP1xx CMSIS || {{highlight|V1.6.0}} || -
| |
| |-
| |
| | STM32MP1xx HAL || {{highlight|V1.6.0}} || -
| |
| |-
| |
| | BSP STM32MP15xx_EVAL || {{highlight|V1.6.0}} || -
| |
| |-
| |
| | BSP STM32MP15xx_DISCO || {{highlight|V1.6.0}} || -
| |
| |}
| |
| | |
| * '''Middleware'''
| |
| {|
| |
| ! Component !! Version !! Notes
| |
| |-
| |
| | FreeRTOS<sup>TM</sup> || V10.0.1 ST modified 20190719 || -
| |
| |-
| |
| | OpenAMP || {{highlight|v2021.10 ST modified 20220118 and ST interface 20220118}} || -
| |
| |-
| |
| |}
| |
| | |
| * '''Utilities'''
| |
| {|
| |
| ! Component !! Version !! Notes
| |
| |-
| |
| | Resourcemanager || V1.11.0 || -
| |
| |}
| |
| | |
| ===Available drivers===
| |
| Find below the list of available HAL and LL drivers :
| |
| | |
| ====HAL drivers====
| |
| {|
| |
| |-
| |
| ! STM32CubeMP1 HAL Driver items !! Description
| |
| |-
| |
| | ADC ||
| |
| * This driver provides firmware functions to manage the following
| |
| * functionalities of the Analog to Digital Convertor (ADC)
| |
| * peripheral:
| |
| * + Initialization and de-initialization functions
| |
| * ++ Initialization and Configuration of ADC
| |
| * + Operation functions
| |
| * ++ Start, stop, get result of conversions of regular
| |
| * group, using 3 possible modes: polling, interruption or DMA.
| |
| * + Control functions
| |
| * ++ Channels configuration on regular group
| |
| * ++ Analog Watchdog configuration
| |
| * + State functions
| |
| * ++ ADC state machine management
| |
| * ++ Interrupts and flags management
| |
| * + Operation functions
| |
| * ++ Start, stop, get result of conversions of ADC group injected,
| |
| * using 2 possible modes: polling, interruption.
| |
| * ++ Calibration
| |
| * +++ ADC automatic self-calibration
| |
| * +++ Calibration factors get or set
| |
| * ++ Multimode feature when available
| |
| * + Control functions
| |
| * ++ Channels configuration on ADC group injected
| |
| * + State functions
| |
| * ++ ADC group injected contexts queue management
| |
| |-
| |
| | CEC ||
| |
| * This driver provides firmware functions to manage the following
| |
| * functionalities of the High Definition Multimedia Interface
| |
| * Consumer Electronics Control Peripheral (CEC).
| |
| * + Initialization and de-initialization function
| |
| * + IO operation function
| |
| * + Peripheral Control function
| |
| |-
| |
| | CRC ||
| |
| * This driver provides firmware functions to manage the following
| |
| * functionalities of the Cyclic Redundancy Check (CRC) peripheral:
| |
| * + Initialization and de-initialization functions
| |
| * + Peripheral Control functions
| |
| * + Peripheral State functions
| |
| * + Extended features functions
| |
| |-
| |
| | CORTEX ||
| |
| * This driver provides firmware functions to manage the following
| |
| * functionalities of the CORTEX (MPU, Cache, …):
| |
| * + Initialization and de-initialization functions
| |
| * + Peripheral Control functions
| |
| |-
| |
| | CRYP ||
| |
| * This driver provides firmware functions to manage the following
| |
| * functionalities of the Cryptography (CRYP) peripheral:
| |
| * + Initialization and de-initialization functions
| |
| * + AES processing functions
| |
| * + DES processing functions
| |
| * + TDES processing functions
| |
| * + DMA callback functions
| |
| * + CRYP IRQ handler management
| |
| * + Peripheral State functions
| |
| * + Extended AES processing functions
| |
| |-
| |
| | DAC ||
| |
| * This driver provides firmware functions to manage the following
| |
| * functionalities of the Digital to Analog Converter (DAC) peripheral:
| |
| * + Initialization and de-initialization functions
| |
| * + IO operation functions
| |
| * + Peripheral Control functions
| |
| * + Peripheral State and Errors functions
| |
| * + Extended features functions
| |
| |-
| |
| | DCMI ||
| |
| * This driver provides firmware functions to manage the following
| |
| * functionalities of the Digital Camera Interface (DCMI) peripheral:
| |
| * + Initialization and de-initialization functions
| |
| * + IO operation functions
| |
| * + Peripheral Control functions
| |
| * + Peripheral State and Error functions
| |
| |-
| |
| | DFSDM ||
| |
| * This driver provides firmware functions to manage the following
| |
| * functionalities of the Digital Filter for Sigma-Delta Modulators
| |
| * (DFSDM) peripherals:
| |
| * + Initialization and configuration of channels and filters
| |
| * + Regular channels configuration
| |
| * + Injected channels configuration
| |
| * + Regular/Injected Channels DMA Configuration
| |
| * + Interrupts and flags management
| |
| * + Analog watchdog feature
| |
| * + Short-circuit detector feature
| |
| * + Extremes detector feature
| |
| * + Clock absence detector feature
| |
| * + Break generation on analog watchdog or short-circuit event
| |
| * + Set and get pulses skipping on channel.
| |
| |-
| |
| | DMA ||
| |
| * This driver provides firmware functions to manage the following
| |
| * functionalities of the Direct Memory Access (DMA) peripheral:
| |
| * + Initialization and de-initialization functions
| |
| * + IO operation functions
| |
| * + Peripheral State and errors functions
| |
| * + Extended features functions
| |
| |-
| |
| | EXTI ||
| |
| * This driver provides firmware functions to manage the following
| |
| * functionalities of the General Purpose Input/Output (EXTI) peripheral:
| |
| * + Initialization and de-initialization functions
| |
| * + IO operation functions
| |
| |-
| |
| | FDCAN ||
| |
| * This driver provides firmware functions to manage the following
| |
| * functionalities of the Flexible DataRate Controller Area Network
| |
| * (FDCAN) peripheral:
| |
| * + Initialization and de-initialization functions
| |
| * + IO operation functions
| |
| * + Peripheral Configuration and Control functions
| |
| * + Peripheral State and Error functions
| |
| |-
| |
| | FMC ||
| |
| * This driver provides a generic firmware to drive SRAM memories
| |
| * mounted as external device.
| |
| |-
| |
| | GPIO ||
| |
| * This driver provides firmware functions to manage the following
| |
| * functionalities of the General Purpose Input/Output (GPIO) peripheral:
| |
| * + Initialization and de-initialization functions
| |
| * + IO operation functions
| |
| * + Extended Peripheral Control functions
| |
| |-
| |
| | HAL ||
| |
| * This driver provides firmware functions to manage the following
| |
| * functionalities of HAL, Tick, SYSCFG, DBGMCU:
| |
| * + Initialization and de-initialization functions
| |
| * + HAL Initialization and de-initialization functions
| |
| * + Configure the source of the time base
| |
| * + HAL Control functions
| |
| * + Tick management (get/set/inc/priority/suspend/resume)
| |
| * + Get HAL revision, the device revision identifier, the device identifier
| |
| * + Enable/Disable DBG wake up on AIEC
| |
| * + Enable/Disable the Debug Module during Domain1 SLEEP mode
| |
| * + Enable/Disable the Debug Module during Domain1 STOP mode
| |
| * + Enable/Disable the Debug Module during Domain1 STANDBY mode
| |
| * + Configure the internal voltage reference buffer voltage scale
| |
| * + Configure the internal voltage reference buffer high impedance mode
| |
| * + Tune the Internal Voltage Reference buffer (VREFBUF)
| |
| * + Enable/Disable the Internal Voltage Reference buffer (VREFBUF)
| |
| * + Ethernet PHY Interface Selection either MII or RMII
| |
| * + Analog Switch control for dual analog pads
| |
| * + Enable/Disable the booster to reduce the total harmonic distortion of the analog
| |
| * + Enable/Power-down the I/O Compensation Cell
| |
| * + To Enable/Disable optimize the I/O speed when the product voltage is low
| |
| * + Code selection for the I/O Compensation cell
| |
| |-
| |
| | HASH ||
| |
| * This driver provides firmware functions to manage the following
| |
| * functionalities of the HASH peripheral:
| |
| * + Initialization and de-initialization methods
| |
| * + HASH or HMAC processing in polling mode
| |
| * + HASH or HMAC processing in interrupt mode
| |
| * + HASH or HMAC processing in DMA mode
| |
| * + Peripheral State methods
| |
| * + HASH or HMAC processing suspension/resumption
| |
| * Additionally, this driver provides functions to manage HMAC
| |
| * multi-buffer DMA-based processing for MD-5, SHA-1, SHA-224
| |
| * and SHA-256.
| |
| |-
| |
| | HSEM ||
| |
| * This driver provides firmware functions to manage the following
| |
| * functionalities of the semaphore peripheral:
| |
| * + Semaphore Take function (2-Step Procedure) , non blocking
| |
| * + Semaphore FastTake function (1-Step Procedure) , non blocking
| |
| * + Semaphore Status check
| |
| * + Semaphore Clear Key Set and Get
| |
| * + Release and release all functions
| |
| * + Semaphore notification enabling and disabling and callnack functions
| |
| * + IRQ handler management
| |
| |-
| |
| | I<sup>2</sup>C ||
| |
| * This driver provides firmware functions to manage the following
| |
| * functionalities of the Inter Integrated Circuit (I<sup>2</sup>C) peripheral:
| |
| * + Initialization and de-initialization functions
| |
| * + IO operation functions
| |
| * + Peripheral State and Errors functions
| |
| * + Extended features functions
| |
| |-
| |
| | IPCC ||
| |
| * This driver provides firmware functions to manage the following
| |
| * functionalities of the Inter-Processor communication controller
| |
| * peripherals (IPCC).
| |
| * + Initialization and de-initialization functions
| |
| * + Configuration, notification and interrupts handling
| |
| * + Peripheral State and Error functions
| |
| |-
| |
| | LPTIM ||
| |
| * This driver provides firmware functions to manage the following
| |
| * functionalities of the Low Power Timer (LPTIM) peripheral:
| |
| * + Initialization and de-initialization functions.
| |
| * + Start/Stop operation functions in polling mode.
| |
| * + Start/Stop operation functions in interrupt mode.
| |
| * + Reading operation functions.
| |
| * + Peripheral State functions.
| |
| |-
| |
| | MDIOS ||
| |
| * This driver provides firmware functions to manage the following
| |
| * functionalities of the MDIOS Peripheral.
| |
| * + Initialization and de-initialization functions
| |
| * + IO operation functions
| |
| * + Peripheral Control functions
| |
| |-
| |
| | MDMA ||
| |
| * This driver provides firmware functions to manage the following
| |
| * functionalities of the Master Direct Memory Access (MDMA) peripheral:
| |
| * + Initialization/de-initialization functions
| |
| * + I/O operation functions
| |
| * + Peripheral State and errors functions
| |
| |-
| |
| | PWR ||
| |
| * This driver provides firmware functions to manage the following
| |
| * functionalities of the Power Controller (PWR) peripheral:
| |
| * + Initialization and de-initialization functions
| |
| * + Peripheral Control functions
| |
| * + Peripheral Extended features functions
| |
| |-
| |
| | QUADSPI ||
| |
| * This driver provides firmware functions to manage the following
| |
| * functionalities of the QuadSPI interface (QSPI).
| |
| * + Initialization and de-initialization functions
| |
| * + Indirect functional mode management
| |
| * + Memory-mapped functional mode management
| |
| * + Auto-polling functional mode management
| |
| * + Interrupts and flags management
| |
| * + MDMA channel configuration for indirect functional mode
| |
| * + Errors management and abort functionality
| |
| |-
| |
| | RCC ||
| |
| * This driver provides firmware functions to manage the following
| |
| * functionalities of the Reset and Clock Control (RCC) peripheral:
| |
| * + Initialization and de-initialization functions
| |
| * + Peripheral Control functions
| |
| * + Extended Peripheral Control functions
| |
| |-
| |
| | RNG ||
| |
| * This driver provides firmware functions to manage the following
| |
| * functionalities of the Random Number Generator (RNG) peripheral:
| |
| * + Initialization and configuration functions
| |
| * + Peripheral Control functions
| |
| * + Peripheral State functions
| |
| |-
| |
| | RTC ||
| |
| * This driver provides firmware functions to manage the following
| |
| * functionalities of the Real-Time Clock (RTC) peripheral:
| |
| * + Initialization/de-initialization functions
| |
| * + Calendar (Time and Date) configuration
| |
| * + Alarms (Alarm A and Alarm B) configuration
| |
| * + WakeUp Timer configuration
| |
| * + TimeStamp configuration
| |
| * + Tampers configuration
| |
| * + Backup Data Registers configuration
| |
| * + RTC Tamper and TimeStamp Pins Selection
| |
| * + Interrupts and flags management
| |
| |-
| |
| | SAI ||
| |
| * This driver provides firmware functions to manage the following
| |
| * functionalities of the Serial Audio Interface (SAI) peripheral:
| |
| * + Initialization/de-initialization functions
| |
| * + I/O operation functions
| |
| * + Peripheral Control functions
| |
| * + Peripheral State functions
| |
| * + Modify PDM microphone delays.
| |
| |-
| |
| | SD ||
| |
| * This driver provides firmware functions to manage the following
| |
| * functionalities of the Secure Digital (SD) peripheral:
| |
| * + Initialization and de-initialization functions
| |
| * + IO operation functions
| |
| * + Peripheral Control functions
| |
| * + Peripheral State functions
| |
| * + Extended features functions
| |
| |-
| |
| | SMARTCARD ||
| |
| * This driver provides firmware functions to manage the following
| |
| * functionalities of the SMARTCARD peripheral:
| |
| * + Initialization and de-initialization functions
| |
| * + IO operation functions
| |
| * + Peripheral Control functions
| |
| * + Peripheral State and Error functions
| |
| * + Extended features functions
| |
| |-
| |
| | SMBUS ||
| |
| * This driver provides firmware functions to manage the following
| |
| * functionalities of the System Management Bus (SMBus) peripheral,
| |
| * based on I<sup>2</sup>C principles of operation :
| |
| * + Initialization and de-initialization functions
| |
| * + IO operation functions
| |
| * + Peripheral State and Errors functions
| |
| |-
| |
| | SPDIFRX ||
| |
| * This driver provides firmware functions to manage the following
| |
| * functionalities of the SPDIFRX audio interface:
| |
| * + Initialization and Configuration
| |
| * + Data transfers functions
| |
| * + DMA transfers management
| |
| * + Interrupts and flags management
| |
| |-
| |
| | SPI ||
| |
| * This driver provides firmware functions to manage the following
| |
| * functionalities of the Serial Peripheral Interface (SPI) peripheral:
| |
| * + Initialization and de-initialization functions
| |
| * + IO operation functions
| |
| * + Peripheral Control functions
| |
| * + Peripheral State functions
| |
| * + IO operation functions
| |
| * + Peripheral Control functions
| |
| |-
| |
| | TIMER ||
| |
| * This driver provides firmware functions to manage the following
| |
| * functionalities of the Timer (TIM) peripheral:
| |
| * + Time Base Initialization
| |
| * + Time Base Start
| |
| * + Time Base Start Interruption
| |
| * + Time Base Start DMA
| |
| * + Time Output Compare/PWM Initialization
| |
| * + Time Output Compare/PWM Channel Configuration
| |
| * + Time Output Compare/PWM Start
| |
| * + Time Output Compare/PWM Start Interruption
| |
| * + Time Output Compare/PWM Start DMA
| |
| * + Time Input Capture Initialization
| |
| * + Time Input Capture Channel Configuration
| |
| * + Time Input Capture Start
| |
| * + Time Input Capture Start Interruption
| |
| * + Time Input Capture Start DMA
| |
| * + Time One Pulse Initialization
| |
| * + Time One Pulse Channel Configuration
| |
| * + Time One Pulse Start
| |
| * + Time Encoder Interface Initialization
| |
| * + Time Encoder Interface Start
| |
| * + Time Encoder Interface Start Interruption
| |
| * + Time Encoder Interface Start DMA
| |
| * + Commutation Event configuration with Interruption and DMA
| |
| * + Time OCRef clear configuration
| |
| * + Time External Clock configuration
| |
| * + Time Hall Sensor Interface Initialization
| |
| * + Time Hall Sensor Interface Start
| |
| * + Time Complementary signal bread and dead time configuration
| |
| * + Time Master and Slave synchronization configuration
| |
| * + Time Output Compare/PWM Channel Configuration (for channels 5 and 6)
| |
| * + Time OCRef clear configuration
| |
| * + Timer remapping capabilities configuration
| |
| |-
| |
| | U(S)ART ||
| |
| * This driver provides firmware functions to manage the following
| |
| * functionalities of the Universal (Synchronous) Asynchronous Receiver Transmitter
| |
| * Peripheral (U(S)ART).
| |
| * + Initialization and de-initialization functions
| |
| * + IO operation functions
| |
| * + Peripheral Control functions
| |
| * + Peripheral State and Error functions
| |
| * + Peripheral Control functions
| |
| |-
| |
| | WWDG ||
| |
| * This driver provides firmware functions to manage the following
| |
| * functionalities of the Window Watchdog (WWDG) peripheral:
| |
| * + Initialization and Configuration functions
| |
| * + IO operation functions
| |
| |}
| |
| | |
| ====LL drivers====
| |
| {|
| |
| |-
| |
| ! STM32CubeMP1 LL Driver items !! Description
| |
| |-
| |
| | ADC ||
| |
| * This driver provides firmware functions to manage the following
| |
| * functionalities of the ADC peripheral:
| |
| * + Initialization/de-initialization functions
| |
| * + Configuration functions (ADC instance, group regular, group injected,
| |
| * channels, analog watchdog, oversampling, multimode)
| |
| * + IT/FLAGS management functions
| |
| |-
| |
| | BUS ||
| |
| * This driver provides firmware functions to manage the following
| |
| * functionalities of the BUS peripheral:
| |
| * + Enable/disable/reset clocks for all system BUS (AHB2, AHB3, AHB4, AHB5, AHB6,
| |
| * AXI, MLAHB, APB1, APB2, APB3, APB4, APB5)
| |
| |-
| |
| | CORTEX ||
| |
| * This driver contains a set of generic APIs that can be used by user:
| |
| * + SYSTICK configuration used by @ref LL_mDelay and @ref LL_Init1msTick functions
| |
| * + Low power mode configuration (SCB register of Cortex<sup>®</sup>-MCU)
| |
| * + API to access to MCU info (CPUID register)
| |
| |-
| |
| | DMA ||
| |
| * This driver provides firmware functions to manage the following
| |
| * functionalities of the DMA peripheral:
| |
| * + Initialization/de-initialization functions
| |
| * + Configuration functions
| |
| * + IT/FLAGS management functions
| |
| |-
| |
| | DMAMUX ||
| |
| * This driver provides firmware functions to manage the following
| |
| * functionalities of the DMAMUX peripheral:
| |
| * + Initialization/de-initialization functions
| |
| * + IT/FLAGS management functions
| |
| |-
| |
| | EXTI ||
| |
| * This driver provides firmware functions to manage the following
| |
| * functionalities of the EXTI peripheral:
| |
| * + Initialization/de-initialization functions
| |
| * + IT/FLAGS/Trigger management functions
| |
| * + Configuration functions
| |
| |-
| |
| | FMC ||
| |
| * This driver provides firmware functions to manage the following
| |
| * functionalities of the PSRAM peripheral:
| |
| * + Initialization/de-initialization functions
| |
| * + Timing management functions
| |
| * + Configuration functions
| |
| |-
| |
| | GPIO ||
| |
| * This driver provides firmware functions to manage the following
| |
| * functionalities of the GPIO peripheral:
| |
| * + Initialization/de-initialization functions
| |
| * + Data access functions
| |
| * + Port configuration functions
| |
| |-
| |
| | HSEM ||
| |
| * This driver provides firmware functions to manage the following
| |
| * functionalities of the HSEM peripheral:
| |
| * + IT/FLAGS management functions
| |
| * +Data management functions
| |
| |-
| |
| | I<sup>2</sup>C ||
| |
| * This driver provides firmware functions to manage the following
| |
| * functionalities of the I<sup>2</sup>C peripheral:
| |
| * + Initialization/de-initialization functions
| |
| * + IT/FLAGS management functions
| |
| * +Data management functions
| |
| * + Configuration functions
| |
| |-
| |
| | IPCC ||
| |
| * This driver provides firmware functions to manage the following
| |
| * functionalities of the IPCC peripheral:
| |
| * + IT/FLAGS management functions
| |
| * + Enable/disable transmit and receive channels functions
| |
| |-
| |
| | LPTIM ||
| |
| * This driver provides firmware functions to manage the following
| |
| * functionalities of the LPTIM peripheral:
| |
| * + Initialization/de-initialization functions
| |
| * + IT/FLAGS management functions
| |
| * + Configuration (Trigger / Clock / Encoder / LPTIM) functions
| |
| |-
| |
| | PWR ||
| |
| * This driver provides firmware functions to manage the following
| |
| * functionalities of the PWR peripheral:
| |
| * + Initialization/de-initialization functions
| |
| * + FLAGS management functions
| |
| * + Configuration functions
| |
| |-
| |
| | RCC ||
| |
| * This driver provides firmware functions to manage the following
| |
| * functionalities of the RCC peripheral:
| |
| * + Clocks management functions (HSE/HSI/CSI/LSE/LSI/MCO/PLL)
| |
| * + RTC/TIMERS functions
| |
| * + IT/FLAGS management functions
| |
| * + De-initialization functions
| |
| * + Get system and peripherals clocks frequency functions
| |
| |-
| |
| | RTC ||
| |
| * This driver provides firmware functions to manage the following
| |
| * functionalities of the RTC peripheral:
| |
| * + Initialization/de-initialization functions
| |
| * + TIME/DATE/ALM functions
| |
| * + Configuration functions
| |
| |-
| |
| | SPI ||
| |
| * This driver provides firmware functions to manage the following
| |
| * functionalities of the SPI peripheral:
| |
| * + Initialization/de-initialization functions
| |
| * + IT/FLAGS management functions
| |
| * + Data / DMA management functions
| |
| * + Configuration functions
| |
| |-
| |
| | SYSTEM ||
| |
| * This driver provides firmware functions to manage the following
| |
| * functionalities of the SYSTEM peripheral:
| |
| * + SYSCFG and DBGMCU functions
| |
| |-
| |
| | TIM ||
| |
| * This driver provides firmware functions to manage the following
| |
| * functionalities of the TIM peripheral:
| |
| * + Initialization/de-initialization functions
| |
| * + Configuration functions (Time base, Capture Compare, Output and Input Channel,
| |
| * Timer Synchro, Break, DMA Burst Mode )
| |
| * + Counter clock selection functions
| |
| * + Timer input remapping functions
| |
| * + IT/FLAGS management functions
| |
| * + DMA management functions
| |
| * + Event management functions
| |
| |-
| |
| | USART ||
| |
| * This driver provides firmware functions to manage the following
| |
| * functionalities of the USART peripheral:
| |
| * + Initialization/de-initialization functions
| |
| * + Configuration functions (Irda, Smartcard, Half duplex,
| |
| * SPI Slave, LIN, Driver enable)
| |
| * + Advanced configurations services functions
| |
| * + IT/FLAGS management functions
| |
| * + DMA management functions
| |
| * + Data management functions
| |
| * + Execution functions
| |
| |-
| |
| | UTILS ||
| |
| * This driver provides firmware functions to manage the following
| |
| * functionalities of the UTILS peripheral:
| |
| * + Device Electronic Signature functions
| |
| * + DELAY functions
| |
| * + SYSTEM functions
| |
| |-
| |
| | WWDG ||
| |
| * This driver provides firmware functions to manage the following
| |
| * functionalities of the WWDG peripheral:
| |
| * + Enable / Disable functions
| |
| * + Configuration functions
| |
| * + IT/FLAGS management functions
| |
| |-
| |
| |}
| |
| | |
| ===Available projects===
| |
| | |
| Find below, the list of available projects for {{Board | type=157C-EV1}} and {{Board | type=157C-DK2}}:
| |
| {{info| '''Note:''' refer to article [[STM32CubeMP1_Package#Introduction_to_boot_mode|Introduction to boot mode]] to get more information about '''Production''' and '''Engineering''' modes}}
| |
| | |
| The preferred supported toolchain for STM32MP15 is now {{Highlight |[[STM32CubeIDE release note|STM32CubeIDE]]}} (All-in-one multi-OS development tool).
| |
| <br>Moreover, other toolchains are compliant with STM32CubeMP1 Package:
| |
| * IAR<sup>TM</sup> Embedded Workbench for ARM<sup>®</sup> (EWARM) toolchain
| |
| * RealView Microcontroller Development Kit (MDK-ARM) toolchain
| |
| | |
| By default, all the examples are available with STM32CubeIDE support.
| |
| The migration on other toolchain is not yet finished, but some of them are available.<br>
| |
| '''Legend:'''
| |
| *{{Highlight |New project}} implemented on STM32CubeMP1 FW v1.6.0.
| |
| *{{STPurple|'''(*)'''}} : List of {{Board | type=157C-DK2|name=short}} and {{Board | type=157C-EV1|name=short}} examples available with 3 IDEs ( STM32CubeIDE, IAR<sup>TM</sup>, KEIL<sup>®</sup>), the others are only available with STM32CubeIDE.
| |
| | |
| {|
| |
| ! Level !! Module Name !! Project Name !! Description !! {{Board | type=157C-DK2|name=short}} !! {{Board | type=157C-EV1|name=short}} !! Mode !! Core
| |
| |-
| |
| ! '''Examples''' !! !! !! !! !! !! !!
| |
| |-
| |
| | || ADC || ADC_SingleConversion_TriggerTimer_DMA || Use the ADC to convert a single channel at each trig from a timer. The conversion data is transferred by DMA into an array, indefinitely (circular mode). || x {{STPurple|'''(*)'''}} || x || Production & Engineering || Cortex<sup>®</sup>-M4
| |
| |-
| |
| | || ADC || {{highlight|'''ADC_AnalogWatchdog'''}} || How to use the ADC peripheral to perform conversions with an analog watchdog and out-of-window interrupts enabled. || - || x || Production & Engineering || Cortex<sup>®</sup>-M4
| |
| |-
| |
| | || ADC || {{highlight|'''ADC_OverSampler '''}} || How to configure and use the ADC to convert an external analog input combined with oversampling feature to increase resolution through the HAL API. || - || x || Production & Engineering || Cortex<sup>®</sup>-M4
| |
| |-
| |
| | || ADC || {{highlight|'''ADC_MultiChannelSingleConversion '''}} || How to use an ADC peripheral to convert several channels. ADC conversions are performed successively in a scan sequence. || - || x || Production & Engineering || Cortex<sup>®</sup>-M4
| |
| |-
| |
| | || CRC || CRC_UserDefinedPolynomial || This example demonstrates the configuration of the CRC using the HAL API. The CRC (cyclic redundancy check) calculation unit computes the 8-bit CRC code for a given buffer of 32-bit data words, based on a user-defined generating polynomial. || x {{STPurple|'''(*)'''}} || x || Production & Engineering || Cortex<sup>®</sup>-M4
| |
| |-
| |
| | || CRYP || CRYP_AES_DMA || This example provides a short description of how to use the CRYPTO peripheral to encrypt and decrypt data using AES-128 algorithm with ECB chaining mode. || x {{STPurple|'''(*)'''}} || x || Production & Engineering || Cortex<sup>®</sup>-M4
| |
| |-
| |
| | || CORTEX || CORTEXM_MPU || Presentation of the MPU feature. This example configures a memory area as privileged read-only, and attempts to perform read and write operations in different modes. || x {{STPurple|'''(*)'''}} || x || Production & Engineering || Cortex<sup>®</sup>-M4
| |
| |-
| |
| | || DAC || DAC_SimpleConversion || How to use the DAC peripheral to do a simple conversion. || - || x || Production & Engineering || Cortex<sup>®</sup>-M4
| |
| |-
| |
| | || DMA || DMA_FIFOMode || This example provides a description of how to use a DMA to transfer a word data buffer from Flash memory to embedded SRAM with FIFO mode enabled through the HAL API. || x {{STPurple|'''(*)'''}} || x || Production & Engineering || Cortex<sup>®</sup>-M4
| |
| |-
| |
| | || FDCAN || FDCAN_Loopback || How to configure the FDCAN to operate in loopback mode. || x {{STPurple|'''(*)'''}} || x || Engineering Only|| Cortex<sup>®</sup>-M4
| |
| |-
| |
| | || GPIO || GPIO_EXTI || How to configure external interrupt lines. || x {{STPurple|'''(*)'''}} || x {{STPurple|'''(*)'''}} || Production & Engineering || Cortex<sup>®</sup>-M4
| |
| |-
| |
| | || HASH || HASH_SHA224SHA256_DMA || This example provides a short description of how to use the HASH peripheral to hash data using SHA224 and SHA256 algorithms. || x {{STPurple|'''(*)'''}} || x || Production & Engineering || Cortex<sup>®</sup>-M4
| |
| |-
| |
| | || I<sup>2</sup>C || I<sup>2</sup>C_TwoBoards_ComDMA || How to handle I<sup>2</sup>C transmit / receive data buffer between two boards, via DMA. || - || x || Production & Engineering || Cortex<sup>®</sup>-M4
| |
| |-
| |
| | || I<sup>2</sup>C || I<sup>2</sup>C_TwoBoards_ComIT || How to handle I<sup>2</sup>C transmit / receive data buffer between two boards, using an interrupt. || x {{STPurple|'''(*)'''}} || x || Production & Engineering || Cortex<sup>®</sup>-M4
| |
| |-
| |
| | || LPTIM || LPTIM_PulseCounter || How to configure and use LPTIM to count pulses through the LPTIM HAL API. || x {{STPurple|'''(*)'''}} || x || Production (DK2) & Engineering (EV1 and DK2) || Cortex<sup>®</sup>-M4
| |
| |-
| |
| | || LPTIM || {{highlight|'''LPTIM_PWM_LSE '''}} || This example describes how to configure and use LPTIM to generate a PWM in low power mode using the LSE as a counter clock, through the HAL LPTIM API. || - || x || Production & Engineering || Cortex<sup>®</sup>-M4
| |
| |-
| |
| | || PWR || {{STPurple|PWR_STOP_CoPro}} || How to enter the CSTOP and STOP modes using CM4 core (also refered to as coprocessor) and wake up from this mode by using external wakeup interrupt. || x {{STPurple|'''(*)'''}} || x || Production Only || Cortex<sup>®</sup>-M4
| |
| |-
| |
| | || QSPI || QSPI_ReadWrite_IT || How to erase part of the QSPI memory, write data in IT mode, read data in IT mode and compare the result in an infinite loop. || - || x || Production & Engineering || Cortex<sup>®</sup>-M4
| |
| |-
| |
| | || SPI || SPI_FullDuplex_ComDMA_Master || Data buffer transmission/reception between two boards via SPI in Polling mode. || x {{STPurple|'''(*)'''}} || x || Production & Engineering || Cortex<sup>®</sup>-M4
| |
| |-
| |
| | || SPI || SPI_FullDuplex_ComDMA_Slave || Data buffer transmission/reception between two boards via SPI using DMA mode. || x {{STPurple|'''(*)'''}} || x || Production & Engineering || Cortex<sup>®</sup>-M4
| |
| |-
| |
| | || SPI || SPI_FullDuplex_ComIT_Master || Data buffer transmission/reception between two boards via SPI using Interrupt mode. || x {{STPurple|'''(*)'''}} || - || Production & Engineering || Cortex<sup>®</sup>-M4
| |
| |-
| |
| | || SPI || SPI_FullDuplex_ComIT_Slave || Data buffer transmission/reception between two boards via SPI using Interrupt mode. || x {{STPurple|'''(*)'''}} || - || Production & Engineering || Cortex<sup>®</sup>-M4
| |
| |-
| |
| | || TIM || TIM_DMABurst || How to update the TIM2_CH4 timer period and the duty cycle using the DMA burst timer feature. || x {{STPurple|'''(*)'''}} || x || Production & Engineering || Cortex<sup>®</sup>-M4
| |
| |-
| |
| | || TIM || {{highlight|'''TIM_OnePulse'''}} || This example shows how to use the TIMER peripheral to generate a single pulse when a rising edge of an external signal is received on the TIMER Input pin. || - || x || Production & Engineering || Cortex<sup>®</sup>-M4
| |
| |-
| |
| | || TIM || {{highlight|'''TIM_PWMOutput'''}} || This example shows how to configure the TIM peripheral in PWM (Pulse Width Modulation) mode. || - || x || Production & Engineering || Cortex<sup>®</sup>-M4
| |
| |-
| |
| | || TIM || {{highlight|'''TIM_Synchronization'''}} || This example shows how to synchronize TIM2 and Timers (TIM8 and TIM1) in parallel mode. || - || x || Production & Engineering || Cortex<sup>®</sup>-M4
| |
| |-
| |
| | || TIM || {{highlight|'''TIM_TimeBase'''}} || This example shows how to configure the TIM peripheral to generate a time base of one second with the corresponding Interrupt request. || - || x || Production & Engineering || Cortex<sup>®</sup>-M4
| |
| |-
| |
| | || UART || UART_TwoBoards_ComDMA || UART transmission (transmit/receive) in DMA mode between two boards. || x {{STPurple|'''(*)'''}} || - || Production & Engineering || Cortex<sup>®</sup>-M4
| |
| |-
| |
| | || UART || UART_TwoBoards_ComIT || UART transmission (transmit/receive) in Interrupt mode between two boards. || x {{STPurple|'''(*)'''}} || x || Production & Engineering || Cortex<sup>®</sup>-M4
| |
| |-
| |
| | || UART || UART_Receive_Transmit_Console || UART transmission (printf/getchar) via console with user interaction. || x {{STPurple|'''(*)'''}} || x || Production & Engineering || Cortex<sup>®</sup>-M4
| |
| |-
| |
| | || WWDG || WWDG_Example || Configuration of the HAL API to periodically update the WWDG counter and simulate a software fault that generates an MCU WWDG reset when a predefined time period has elapsed. || x {{STPurple|'''(*)'''}} || x || Production & Engineering || Cortex<sup>®</sup>-M4
| |
| |-
| |
| | || Total number of examples: 48 || || || 20 || 28 || ||
| |
| |-
| |
| ! '''Applications''' !! !! !! !! !! !! !!
| |
| |-
| |
| | || CoproSync || CoproSync_ShutDown || Send a shutdown notification to the Cortex<sup>®</sup>-M4 so that it is able to take necessary actions before going to reset state. || x {{STPurple|'''(*)'''}} || x || Production || Cortex<sup>®</sup>-M4
| |
| |-
| |
| | || FreeRTOS<sup>TM</sup> || FreeRTOS_ThreadCreation || How to implement thread creation using CMSIS RTOS API. || x {{STPurple|'''(*)'''}} || x {{STPurple|'''(*)'''}} || Production & Engineering || Cortex<sup>®</sup>-M4
| |
| |-
| |
| | || OpenAMP || OpenAMP_Dynamic_ResMgr || How to use OpenAMP MW + Virtual UART to create an Inter-Processor Communication channel seen as TTY device in Linux<sup>®</sup> OS. || - || x || Production || Cortex<sup>®</sup>-M4
| |
| |-
| |
| | || OpenAMP || OpenAMP_TTY_echo || How to use OpenAMP MW + Virtual UART to create an Inter-Processor Communication channel seen as TTY device in Linux<sup>®</sup> OS || x {{STPurple|'''(*)'''}} || x || Production || Cortex<sup>®</sup>-M4
| |
| |-
| |
| | || OpenAMP || OpenAMP_TTY_echo_wakeup || How to use OpenAMP MW to enter in different power system operating mode (Run, Stop and Standby). || x || x || Production || Cortex<sup>®</sup>-M4
| |
| |-
| |
| | || OpenAMP || OpenAMP_raw || How to use OpenAMP MW to create an Inter-Processor Communication channel || x{{STPurple|'''(*)'''}} || x {{STPurple|'''(*)'''}} || Production || Cortex<sup>®</sup>-M4
| |
| |-
| |
| | || OpenAMP || {{highlight|'''OpenAMP_for_signed_fw'''}} || How to use OpenAMP MW + Virtual UART to create an <br>Inter-Processor Communication channel seen as TTY device in Linux OS for protected firmware loaded by OP-TEE secure application. || x{{STPurple|'''(*)'''}} || x || Production || Cortex<sup>®</sup>-M4
| |
| |-
| |
| | || OpenAMP || OpenAMP_FreeRTOS_echo || How to use OpenAMP MW with FreeRTOS<sup>TM</sup>. || x || x || Production || Cortex<sup>®</sup>-M4
| |
| |-
| |
| | || Total number of applications: 15 || || || 7 || 8 || ||
| |
| |-
| |
| ! '''Demonstrations''' !! !! !! !! !! !! !!
| |
| |-
| |
| | || AI || AI_Character_Recognition || This project demonstrates a complex application that is running on both CPU1(CA7) and CPU2(CM4) || x || x || Production || Cortex<sup>®</sup>-M4
| |
| |-
| |
| | || Total number of demonstrations: 2 || || || 1 || 1 || ||
| |
| |-
| |
| ! '''Templates''' !! !! !! !! !! !! !!
| |
| |-
| |
| | || - || Starter project || This projects provides a reference template that can be used to build any firmware application in Engineering mode on Cortex<sup>®</sup>-M4 || x {{STPurple|'''(*)'''}} || x {{STPurple|'''(*)'''}} || Engineering || Cortex<sup>®</sup>-M4
| |
| |-
| |
| | || Total number of templates: 2 || || || 1 || 1 || ||
| |
| |-
| |
| ! Total number of projects: 67 || || || || 29 || 38 || ||
| |
| |}
| |
| | |
| ==Minor release updates==
| |
| STMicroelectronics regularly delivers corrections through github<sup>®</sup> components.
| |
| The corrections can be incorporated them into your developer package or distribution package.
| |
| | |
| Refer to [[STM32MP1 Developer Package]] or [[OpenSTLinux_distribution#Reference_source_code|How to switch to github<sup>®</sup> mode in Distribution Package]].
| |
| | |
| ==How to get started with STM32CubeMP1 Package==
| |
| Refer to [[STM32_MPU_ecosystem_release_note#How_to_download_the_software_and_start_with_this_release-3F| How to get software and start with this release]].
| |
| | |
| ==Associated tools==
| |
| Refer to [[STM32_MPU_ecosystem_release_note#Referenced tools release notes | Referenced tools release notes ]] to obtain more information on all available tools.
| |
| | |
| ==References==
| |
| <references/>
| |
| | |
| <noinclude>
| |
| {{PublicationRequestId | 24129| 2022-07-27| previous TW : 19669 2021-04-20 (PhilipS)}}
| |
| [[Category:Release notes archives]]
| |
| </noinclude>
| |