Difference between revisions of "STM internal peripheral"

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1 Article purpose[edit]

The purpose of this article is to:

  • briefly introduce the STM peripheral and its main features
  • indicate the level of security supported by this hardware block
  • explain how each instance can be is allocated to each of the three runtime contexts and linked to the corresponding software components
  • explain, when necessary, how to configure the STM peripheral.

2 Peripheral overview[edit]

The STM peripheral is used to log STM trace traces into the embedded trace FIFO (ETF). This trace can include hardware events (the list is given in the STM32MP15 reference manuals) or direct 'printf like' log from the CortexTemplate:Sup®-A7. Once in the ETF buffer, the trace can directly be dumped directly from the CortexTemplate:Sup®-A7 or to the trace port interface unit (TPIU), connected to an external probe able to decode it.

2.1 Features[edit]

Refer to the STM32MP15 reference manuals for the complete list of features, and to the software components, introduced below, to see which features are really implemented.

2.2 Security support[edit]

The STM is a non secure peripheral.

3 Peripheral usage and associated software[edit]

3.1 Boot time[edit]

The STM is not used at boot timecan be used to debug the boot sequence using an external probe, without any associated embedded software.

3.2 Runtime[edit]

3.2.1 Overview[edit]

The STM can be assigned used to the CortexTemplate:Sup-A7 non-secure for using in Linux with coresight framework.
This driver allows to select the hardware events (listed in the STM32MP15 reference manuals) to log via the STM peripheral into the ETF and dump it in the Linux console for analysis. debug the run time application using an external probe, without any associated embedded software.

3.2.2 Software frameworks[edit]

Domain Peripheral Software components Comment OP-TEE Linux STM32Cube Trace & Debug STM Linux Coresight framework

There is no software dedicated to the STM internal peripheral delivered with the STM32MPU ecosystem but the STM trace can be captured using an external probe.

3.2.3 Peripheral configuration[edit]

The configuration is applied by the firmware running in the context to which the peripheral is assigned. The configuration can be done alone via the STM32CubeMX tool for all internal peripherals, and then manually completed (particularly for external peripherals), according to the information given in the corresponding software framework articleConfiguration of the STM is done via JTAG scripts. Those scripts must be built by the user using the STM32MP15 reference manuals .

3.2.4 Peripheral assignment[edit]

Internal peripherals

Check boxes illustrate the possible peripheral allocations supported by STM32 MPU Embedded Software:

  • means that the peripheral can be assigned () to the given runtime context.
  • is used for system peripherals that cannot be unchecked because they are statically connected in the device.

Refer to How to assign an internal peripheral to a runtime context for more information on how to assign peripherals manually or via STM32CubeMX.
The present chapter describes STMicroelectronics recommendations or choice of implementation. Additional possiblities might be described in STM32MP15 reference manuals.

Domain Peripheral Runtime allocation Comment
Instance Cortex-A7
secure
(OP-TEE)
Cortex-A7
non-secure
(Linux)
Cortex-M4

(STM32Cube)
Trace & Debug STM STM

4 References[edit]

No assignment possible



<noinclude>

{{ArticleBasedOnModel | [[Internal peripheral article model]]}}
{{ArticleMainWriter | GeraldB}}
{{ArticleApprovedVersion| GeraldB | AlexandreT | No previous approved version | BrunoB - 19Oct'18 - 9288 | 24'May18}} 
[[Category:Trace and debug peripherals]]</noinclude>

==Article purpose==
The purpose of this article is to:
* briefly introduce the STM peripheral and its main features
* indicate the level of security supported by this hardware block
* explain how each instance can be is allocated to each of the three runtime contexts and linked to the corresponding software components
* explain, when necessary, how to configure the STM peripheral.

==Peripheral overview==
The '''STM''' peripheral is used to log STM tracetraces into the embedded trace FIFO (ETF). This trace can include hardware events (the list is given in the [[STM32MP15 resources#Reference manuals|STM32MP15 reference manuals]]) or direct 'printf like' log from the Cortex{{<sup>|&reg;}}</sup>-A7. Once in the ETF buffer, the trace can directly be dumped directly from the Cortex{{<sup>|&reg;}}</sup>-A7 or to the trace port interface unit (TPIU), connected to an external probe able to decode it.<br />


===Features===
Refer to the [[STM32MP15 resources#Reference manuals|STM32MP15 reference manuals]] for the complete list of features, and to the software components, introduced below, to see which features are really implemented.<br>


===Security support===
The STM is a '''non secure''' peripheral.

==Peripheral usage and associated software==
===Boot time===
The STM is notcan be used at boot timeto debug the boot sequence using an external probe, without any associated embedded software.

===Runtime===
====Overview====
The STM can be assignedused to debug the Cortex{{sup|&reg;}}-A7 non-secure for using in Linux with [[Coresight overview|coresight framework]]. <br />

This driver allows to select the hardware events (listed in the [[STM32MP15 resources#Reference manuals|STM32MP15 reference manuals]]) to log via the STM peripheral into the ETF and dump it in the Linux console for analysis.

====Software frameworks====
{{:Internal_peripherals_software_table_template}}
 | Trace & Debug
 | [[STM internal peripheral|STM]]
 | 
 | [[Coresight overview|Linux Coresight framework]]
 | 
 |
 |-
 |}

====Peripheral configuration====
The configuration is applied by the firmware running in the context to which the peripheral is assigned. The configuration can be done alone via the [[STM32CubeMX]] tool for all internal peripherals, and then manually completed (particularly for external peripherals), according to the information given in the corresponding software framework articlerun time application using an external probe, without any associated embedded software.

====Software frameworks====
There is no software dedicated to the STM internal peripheral delivered with the STM32MPU ecosystem but the STM trace can be captured using an external probe.

====Peripheral configuration====
Configuration of the STM is done via JTAG scripts. Those scripts must be built by the user using the [[STM32MP15 resources#Reference manuals|STM32MP15 reference manuals]] .

====Peripheral assignment====
{{:Internal_peripherals_assignment_table_template}}<onlyinclude>

 | rowspan="1" | Trace & Debug
 | rowspan="1" | [[STM internal peripheral|STM]]
 | STM
 |
 | <span title="assignable peripheral" style="font-size:21px"></span>

 |
 |
 |-</onlyinclude>

 |}

==References==<references/>

 |
 | No assignment possible 
 |-</onlyinclude>

 |}
<noinclude>

{{ArticleBasedOnModel | Internal peripheral article model}}
{{PublicationRequestId | 20004| 2021-05-12|  previous TLMS 9288 reviewed by BrunoB}}
[[Category:Arm CoreSight peripherals]]</noinclude>
(15 intermediate revisions by 5 users not shown)
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<noinclude>
 
{{ArticleBasedOnModel | [[Internal peripheral article model]]}}
 
{{ArticleMainWriter | GeraldB}}
 
{{ArticleApprovedVersion| GeraldB | AlexandreT | No previous approved version | BrunoB - 19Oct'18 - 9288 | 24'May18}}
 
[[Category:Trace and debug peripherals]]
 
</noinclude>
 
 
 
==Article purpose==
 
==Article purpose==
 
The purpose of this article is to:
 
The purpose of this article is to:
 
* briefly introduce the STM peripheral and its main features
 
* briefly introduce the STM peripheral and its main features
 
* indicate the level of security supported by this hardware block
 
* indicate the level of security supported by this hardware block
* explain how each instance can be allocated to the three runtime contexts and linked to the corresponding software components
+
* explain how each instance is allocated to each of the three runtime contexts and linked to the corresponding software components
 
* explain, when necessary, how to configure the STM peripheral.
 
* explain, when necessary, how to configure the STM peripheral.
   
 
==Peripheral overview==
 
==Peripheral overview==
The '''STM''' peripheral is used to log STM trace into the embedded trace FIFO (ETF). This trace can include hardware events (the list is given in the [[STM32MP15 resources#Reference manuals|STM32MP15 reference manuals]]) or direct 'printf like' log from the Cortex{{sup|&reg;}}-A7. Once in the ETF buffer, the trace can directly be dumped from the Cortex{{sup|&reg;}}-A7 or to the trace port interface unit (TPIU), connected to an external probe able to decode it.<br />
+
The '''STM''' peripheral is used to log STM traces into the embedded trace FIFO (ETF). This trace can include hardware events (the list is given in the [[STM32MP15 resources#Reference manuals|STM32MP15 reference manuals]]) or direct 'printf like' log from the Cortex<sup>&reg;</sup>-A7. Once in the ETF buffer, the trace can be dumped directly from the Cortex<sup>&reg;</sup>-A7 or to the trace port interface unit (TPIU), connected to an external probe able to decode it.<br />
   
 
===Features===
 
===Features===
Line 24: Line 17:
 
==Peripheral usage and associated software==
 
==Peripheral usage and associated software==
 
===Boot time===
 
===Boot time===
The STM is not used at boot time.
+
The STM can be used to debug the boot sequence using an external probe, without any associated embedded software.
   
 
===Runtime===
 
===Runtime===
 
====Overview====
 
====Overview====
The STM can be assigned to the Cortex{{sup|&reg;}}-A7 non-secure for using in Linux with [[Coresight overview|coresight framework]]. <br />
+
The STM can be used to debug the run time application using an external probe, without any associated embedded software.
This driver allows to select the hardware events (listed in the [[STM32MP15 resources#Reference manuals|STM32MP15 reference manuals]]) to log via the STM peripheral into the ETF and dump it in the Linux console for analysis.
 
   
 
====Software frameworks====
 
====Software frameworks====
{{:Internal_peripherals_software_table_template}}
+
There is no software dedicated to the STM internal peripheral delivered with the STM32MPU ecosystem but the STM trace can be captured using an external probe.
| Trace & Debug
 
| [[STM internal peripheral|STM]]
 
|
 
| [[Coresight overview|Linux Coresight framework]]
 
|
 
|
 
|-
 
|}
 
   
 
====Peripheral configuration====
 
====Peripheral configuration====
The configuration is applied by the firmware running in the context to which the peripheral is assigned. The configuration can be done alone via the [[STM32CubeMX]] tool for all internal peripherals, and then manually completed (particularly for external peripherals), according to the information given in the corresponding software framework article.
+
Configuration of the STM is done via JTAG scripts. Those scripts must be built by the user using the [[STM32MP15 resources#Reference manuals|STM32MP15 reference manuals]] .
   
 
====Peripheral assignment====
 
====Peripheral assignment====
Line 52: Line 36:
 
  | STM
 
  | STM
 
  |
 
  |
| <span title="assignable peripheral" style="font-size:21px">☐</span>
+
  |  
  |
 
 
  |
 
  |
  +
| No assignment possible
 
  |-
 
  |-
 
</onlyinclude>
 
</onlyinclude>
 
  |}
 
  |}
   
==References==
+
<noinclude>
<references/>
+
{{ArticleBasedOnModel | Internal peripheral article model}}
  +
{{PublicationRequestId | 20004| 2021-05-12|  previous TLMS 9288 reviewed by BrunoB}}
  +
[[Category:Arm CoreSight peripherals]]
  +
</noinclude>