SDMMC internal peripheral

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1 Article purpose

The purpose of this article is to

• briefly introduce the SDMMC peripheral and its main features
• indicate the level of security supported by this hardware block
• explain how each instance can be allocated to the three runtime contexts and linked to the corresponding software components
• explain, when needed, how to configure the SDMMC peripheral.

2 Peripheral overview

The SDMMC peripheral is used to interconnect STM32 MPU to SD memory cards, SDIO and MMC devices.

2.1 Features

Refer to STM32MP15 reference manuals for the complete list of features, and to the software components, introduced below, to know which features are really implemented.

2.2 Security support

SDMMC1/2/3 instances are either non-secure or secure peripherals (under ETZPC control).

Warning

When an SDMMC instance is secure internal, the DMA cannot be used to perform data transfers. STMicroelectronics does not provide secure MMC driver (see below chapter)

3 Peripheral usage and associated software

3.1 Boot time

SDMMC1/2 instances can be used to support memory boot on SD or MMC Flash devices.

The SDMMC3 is not used at boot time.

3.2 Runtime

3.2.1 Overview

SDMMC1/2/3 instances can be allocated to:

• the Arm^® Cortex^®-A7 non-secure core to be used under Linux^® with the MMC framework
• the Arm^® Cortex^®-M4 to be used with STM32Cube MPU Package with STM32Cube SDMMC driver

Chapter #Peripheral assignment describes which peripheral instance can be assigned to which context.

3.2.2 Software frameworks

Domain	Peripheral	Software frameworks			Comment
		Cortex-A7 S (OP-TEE)	Cortex-A7 NS (Linux)	Cortex-M4 (STM32Cube)
Mass storage	SDMMC		Linux MMC framework	STM32Cube SDMMC driver

3.2.3 Peripheral configuration

The configuration is applied by the firmware running in the context to which the peripheral is assigned. The configuration by itself can be performed via the STM32CubeMX tool for all internal peripherals. It can then be manually completed (especially for external peripherals) according to the information given in the corresponding software framework article.

For Linux^® kernel configuration, please refer to SDMMC device tree configuration.

3.2.4 Peripheral assignment

Internal peripherals

Check boxes illustrate the possible peripheral allocations supported by STM32 MPU Embedded Software:

☐ means that the peripheral can be assigned (☑) to the given runtime context.

✓ is used for system peripherals that cannot be unchecked because they are statically connected in the device.

Refer to How to assign an internal peripheral to a runtime context for more information on how to assign peripherals manually or via STM32CubeMX.
The present chapter describes STMicroelectronics recommendations or choice of implementation. Additional possiblities might be described in STM32MP15 reference manuals.

Domain	Peripheral	Runtime allocation				Comment
		Instance	Cortex-A7 S (OP-TEE)	Cortex-A7 NS (Linux)	Cortex-M4 (STM32Cube)
Mass storage	SDMMC	SDMMC1		☐
		SDMMC2		☐
		SDMMC3		☐	☐	Assignment (single choice)

4 How to go further

Chapter not applicable right now, maybe completed later.

5 References

Chapter not applicable right now, maybe completed later.