Difference between revisions of "RNG internal peripheral"

[quality revision] [quality revision]
m
 
m (Cleanup)
 





1 Article purpose[edit]

The purpose of this article is to:

  • briefly introduce the RNG peripheral and its main features
  • indicate the level of security supported by this hardware block
  • explain how each instance can be allocated to the three runtime contexts and linked to the corresponding software components
  • explain how to configure the RNG peripheral.

2 Peripheral overview[edit]

The RNG peripheral is used to provide 32-bit random numbers.

2.1 Features[edit]

Refer to STM32MP15 reference manuals for the complete list of features, and to the software components, introduced below, to know which features are really implemented.

2.2 Security support[edit]

RNG1 is a secure peripheral (under ETZPC control).
RNG2 is a non-secure peripheral.

3 Peripheral usage and associated software[edit]

3.1 Boot time[edit]

RNG instances are not used as boot devices.

3.2 Runtime[edit]

3.2.1 Overview[edit]

RNG instances can be allocated to:

  • the Arm® Cortex®-A7 secure core to be controlled in OP-TEE with OP-TEE RNG driver

or

or

Chapter #Peripheral assignment exposes which instance can be assigned to which context.

3.2.2 Software frameworks[edit]

Domain Peripheral Software frameworks Comment
Cortex-A7
secure
(OP-TEE)
Cortex-A7
non-secure
(Linux)
Cortex-M4

(STM32Cube)
Security RNG OP-TEE RNG driver Linux hardware random framework STM32Cube RNG driver

3.2.3 Peripheral configuration[edit]

The configuration is applied by the firmware running in the context to which the peripheral is assigned. The configuration can be done alone via the STM32CubeMX tool for all internal peripherals, and then manually completed (particularly for external peripherals), according to the information given in the corresponding software framework article.

3.2.4 Peripheral assignment[edit]

Internal peripherals

Check boxes illustrate the possible peripheral allocations supported by STM32 MPU Embedded Software:

  • means that the peripheral can be assigned () to the given runtime context.
  • is used for system peripherals that cannot be unchecked because they are statically connected in the device.

Refer to How to assign an internal peripheral to a runtime context for more information on how to assign peripherals manually or via STM32CubeMX.
The present chapter describes STMicroelectronics recommendations or choice of implementation. Additional possiblities might be described in STM32MP15 reference manuals.

Domain Peripheral Runtime allocation Comment
Instance Cortex-A7
secure
(OP-TEE)
Cortex-A7
non-secure
(Linux)
Cortex-M4

(STM32Cube)
Security RNG RNG1 Assignment (single choice)
RNG2

4 How to go further[edit]

Not applicable.

5 References[edit]

<noinclude>

{{ArticleBasedOnModel| [[Internal peripheral article model]]}}
{{ArticleMainWriter|LionelD}}
{{ArticleApprovedVersion| LionelD| FabienD, GeraldB | No previous approved version | AlainF - 19Sep'18 - 8788 | 25Sep'18 }} 

[[Category:Security peripherals]]
</noinclude>

==Article purpose==
The purpose of this article is to:
* briefly introduce the RNG peripheral and its main features
* indicate the level of security supported by this hardware block
* explain how each instance can be allocated to the three runtime contexts and linked to the corresponding software components
* explain how to configure the RNG peripheral.

==Peripheral overview==
The '''RNG''' peripheral is used to provide 32-bit random numbers.<br />


===Features===
Refer to [[STM32MP15 resources#Reference manuals|STM32MP15 reference manuals]] for the complete list of features, and to the software components, introduced below, to know which features are really implemented.

===Security support===
RNG1 is a '''secure''' peripheral (under [[ETZPC_internal_peripheral|ETZPC]] control).<br />

RNG2 is a '''non-secure''' peripheral.

==Peripheral usage and associated software==
===Boot time===
RNG instances are not used as boot devices.

===Runtime===
====Overview====
RNG instances can be allocated to:
* the Arm<sup>&reg;</sup> Cortex<sup>&reg;</sup>-A7 secure core to be controlled in OP-TEE with [[OP-TEE_overview|OP-TEE RNG driver]]
or
* the Arm<sup>&reg;</sup> Cortex<sup>&reg;</sup>-A7 non-secure core to be controlled in Linux<sup>&reg;</sup> by the [[Hardware random overview|Linux hardware random framework]]
or
* the Arm<sup>&reg;</sup> Cortex<sup>&reg;</sup>-M4 to be controlled in STM32Cube MPU Package by [[STM32CubeMP1 architecture|STM32Cube RNG driver]]

Chapter [[#Peripheral assignment]] exposes which instance can be assigned to which context.

====Software frameworks====
{{:Internal_peripherals_software_table_template}}
 | Security
 | [[RNG internal peripheral|RNG]]
 | [[OP-TEE_overview|OP-TEE RNG driver]]
 | [[Hardware random overview|Linux hardware random framework]]
 | [[STM32CubeMP1 architecture|STM32Cube RNG driver]]
 |
 |-
 |}

====Peripheral configuration====
The configuration is applied by the firmware running in the context to which the peripheral is assigned. The configuration can be done alone via the [[STM32CubeMX]] tool for all internal peripherals, and then manually completed (particularly for external peripherals), according to the information given in the corresponding software framework article.

====Peripheral assignment====
{{:Internal_peripherals_assignment_table_template}}<onlyinclude>

 | rowspan="2" | Security
 | rowspan="2" | [[RNG internal peripheral|RNG]]
 | RNG1
 | <span title="assignable peripheral" style="font-size:21px"></span>

 | <span title="assignable peripheral" style="font-size:21px"></span>

 | 
 | Assignment (single choice)
 |-
 | RNG2
 | 
 | 
 | <span title="assignable peripheral" style="font-size:21px"></span>

 | 
 |-</onlyinclude>

 |}

==How to go further==
Not applicable.

==References==<references/>

<noinclude>

{{ArticleBasedOnModel| [[Internal peripheral article model]]}}
{{PublicationRequestId | 8788 | 2018-09-18 | AlainF}}
[[Category:Security peripherals]]</noinclude>
Line 1: Line 1:
<noinclude>
 
{{ArticleBasedOnModel| [[Internal peripheral article model]]}}
 
{{ArticleMainWriter|LionelD}}
 
{{ArticleApprovedVersion| LionelD| FabienD, GeraldB | No previous approved version | AlainF - 19Sep'18 - 8788 | 25Sep'18 }}
 
 
[[Category:Security peripherals]]
 
 
</noinclude>
 
 
 
==Article purpose==
 
==Article purpose==
 
The purpose of this article is to:
 
The purpose of this article is to:
Line 79: Line 70:
 
==References==
 
==References==
 
<references/>
 
<references/>
  +
  +
<noinclude>
  +
{{ArticleBasedOnModel| [[Internal peripheral article model]]}}
  +
{{PublicationRequestId | 8788 | 2018-09-18 | AlainF}}
  +
[[Category:Security peripherals]]
  +
</noinclude>

Attachments

Discussions