Difference between revisions of "LTDC device tree configuration"

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Applicable for STM32MP13x lines, STM32MP15x lines

1 Article purpose[edit]

This article explains how to configure the LTDC [1] when the peripheral is assigned to the Linux® OS.

The configuration is performed using the device tree mechanism [2].

The Device tree provides a hardware description of the LTDC [1] used by the STM32 LTDC Linux driver.

2 DT bindings documentation[edit]

The LTDC is represented by the STM32 LTDC device tree bindings [3].

3 DT configuration[edit]

This hardware description is a combination of the STM32 microprocessor device tree files (.dtsi extension) and board device tree files (.dts extension). See the Device tree for an explanation of the device tree file split.

STM32CubeMX can be used to generate the board device tree. Refer to How to configure the DT using STM32CubeMX for more details.

Warning white.png Warning
The below device tree examples are related to the STM32MP15x lines. The STM32MP13x lines device tree examples will be added in the future. Meanwhile please refer to the related Linux kernel source code.

3.1 DT configuration (STM32 level)[edit]

The LTDC device tree node is declared in stm32mp151.dtsi [4]. The declaration (shown below) provides the hardware registers base address, the clocks, the interrupts and the reset. Note: The port is also pre-populated to facilitate its use in the many other device tree files.

ltdc: display-controller@5a001000

:

/ {
	soc {
...
		ltdc: display-controller@5a001000 {
			compatible = "st,stm32-ltdc";
			reg = <0x5a001000 0x400>;
			interrupts = <GIC_SPI 88 IRQ_TYPE_LEVEL_HIGH>,
				     <GIC_SPI 89 IRQ_TYPE_LEVEL_HIGH>;
			clocks = <&rcc LTDC_PX>;
			clock-names = "lcd";
			resets = <&scmi_reset RST_SCMI_LTDC>;
			status = "disabled";
		};
	};
};

/ {
	soc {
...
		ltdc: display-controller@5a001000 {
			compatible = "st,stm32-ltdc";
			reg = 
<0x5a001000
<0x5a001000 
0x400>
0x400>;
			interrupts = 
<GIC
<GIC_SPI 88 IRQ_TYPE_LEVEL_
HIGH>
HIGH>,
				     
<GIC
<GIC_SPI 89 IRQ_TYPE_LEVEL_
HIGH>
HIGH>;
			clocks = <&rcc LTDC_
PX>
PX>;
			clock-names = "lcd";
			resets = <&rcc LTDC_
R>
R>;
			status = "disabled";

			port {
				#address-cells = <1>;
				#size-cells = <0>;
			};
		};
};

The declaration (shown above) provides the hardware registers base address, the clocks, the interrupts and the reset. The port may be pre-populated to facilitate its use in the many other device tree files.

Warning white.png Warning
This device tree part is related to STM32 microprocessors. It must be kept as is, without being modified by the end-user.

3.2 DT configuration (board level)[edit]

The LTDC device tree related to a particular board may have the following nodes, depending on the board hardware:

  • ltdc node: containing the LTDC pinctrl references and the in/out port descriptions
  • panel or i2cx bridge rgb node (depending of the board hardware): containing the in/out port descriptions related to the LTDC node
  • panel_backlight node (depending of the board hardware): related to the panel or bridge node

A full example of the LTDC pins [54] is available in the stm32mp15:

[6]
  • on STM32MP13x lines
&pinctrl {
...
	ltdc_pins_a: ltdc-0 {
		pins {
			pinmux = <STM32_PINMUX('D',  9, AF13)>, /* LCD_CLK */
				 <STM32_PINMUX('C',  6, AF14)>, /* LCD_HSYNC */
				 <STM32_PINMUX('G',  4, AF11)>, /* LCD_VSYNC */
				 <STM32_PINMUX('H',  9, AF11)>, /* LCD_DE */
				 <STM32_PINMUX('G',  7, AF14)>, /* LCD_R2 */
				 <STM32_PINMUX('B', 12, AF13)>, /* LCD_R3 */
				 <STM32_PINMUX('D', 14, AF14)>, /* LCD_R4 */
				 <STM32_PINMUX('E',  7, AF14)>, /* LCD_R5 */
				 <STM32_PINMUX('E', 13, AF14)>, /* LCD_R6 */
				 <STM32_PINMUX('E',  9, AF14)>, /* LCD_R7 */
				 <STM32_PINMUX('H', 13, AF14)>, /* LCD_G2 */
				 <STM32_PINMUX('F',  3, AF14)>, /* LCD_G3 */
				 <STM32_PINMUX('D',  5, AF14)>, /* LCD_G4 */
				 <STM32_PINMUX('G',  0, AF14)>, /* LCD_G5 */
				 <STM32_PINMUX('C',  7, AF14)>, /* LCD_G6 */
				 <STM32_PINMUX('A', 15, AF11)>, /* LCD_G7 */
				 <STM32_PINMUX('D', 10, AF14)>, /* LCD_B2 */
				 <STM32_PINMUX('F',  2, AF14)>, /* LCD_B3 */
				 <STM32_PINMUX('H', 14, AF11)>, /* LCD_B4 */
				 <STM32_PINMUX('E',  0, AF14)>, /* LCD_B5 */
				 <STM32_PINMUX('B',  6, AF7)>,  /* LCD_B6 */
				 <STM32_PINMUX('F',  1, AF13)>; /* LCD_B7 */
			bias-disable;
			drive-push-pull;
			slew-rate = <0>;
		};
	};

	ltdc_sleep_pins_a: ltdc-sleep-0 {
		pins {
			pinmux = <STM32_PINMUX('D',  9, ANALOG)>, /* LCD_CLK */
				 <STM32_PINMUX('C',  6, ANALOG)>, /* LCD_HSYNC */
				 <STM32_PINMUX('G',  4, ANALOG)>, /* LCD_VSYNC */
				 <STM32_PINMUX('H',  9, ANALOG)>, /* LCD_DE */
				 <STM32_PINMUX('G',  7, ANALOG)>, /* LCD_R2 */
				 <STM32_PINMUX('B', 12, ANALOG)>, /* LCD_R3 */
				 <STM32_PINMUX('D', 14, ANALOG)>, /* LCD_R4 */
				 <STM32_PINMUX('E',  7, ANALOG)>, /* LCD_R5 */
				 <STM32_PINMUX('E', 13, ANALOG)>, /* LCD_R6 */
				 <STM32_PINMUX('E',  9, ANALOG)>, /* LCD_R7 */
				 <STM32_PINMUX('H', 13, ANALOG)>, /* LCD_G2 */
				 <STM32_PINMUX('F',  3, ANALOG)>, /* LCD_G3 */
				 <STM32_PINMUX('D',  5, ANALOG)>, /* LCD_G4 */
				 <STM32_PINMUX('G',  0, ANALOG)>, /* LCD_G5 */
				 <STM32_PINMUX('C',  7, ANALOG)>, /* LCD_G6 */
				 <STM32_PINMUX('A', 15, ANALOG)>, /* LCD_G7 */
				 <STM32_PINMUX('D', 10, ANALOG)>, /* LCD_B2 */
				 <STM32_PINMUX('F',  2, ANALOG)>, /* LCD_B3 */
				 <STM32_PINMUX('H', 14, ANALOG)>, /* LCD_B4 */
				 <STM32_PINMUX('E',  0, ANALOG)>, /* LCD_B5 */
				 <STM32_PINMUX('B',  6, ANALOG)>, /* LCD_B6 */
				 <STM32_PINMUX('F',  1, ANALOG)>; /* LCD_B7 */
		};
	};
...
};

&pinctrl {
...
	ltdc_pins_a: ltdc-0 {
		pins {
			pinmux = 
<STM32
<STM32_PINMUX('G',  7, AF14)>, /* LCD_CLK */
				 
<STM32
<STM32_PINMUX('I', 10, AF14)>, /* LCD_HSYNC */
				 
<STM32
<STM32_PINMUX('I',  9, AF14)>, /* LCD_VSYNC */
				 
<STM32
<STM32_PINMUX('F', 10, AF14)>, /* LCD_DE */
				 
<STM32
<STM32_PINMUX('H',  2, AF14)>, /* LCD_R0 */
				 
<STM32
<STM32_PINMUX('H',  3, AF14)>, /* LCD_R1 */
				 
<STM32
<STM32_PINMUX('H',  8, AF14)>, /* LCD_R2 */
				 
<STM32
<STM32_PINMUX('H',  9, AF14)>, /* LCD_R3 */
				 
<STM32
<STM32_PINMUX('H', 10, AF14)>, /* LCD_R4 */
				 
<STM32
<STM32_PINMUX('C',  0, AF14)>, /* LCD_R5 */
				 
<STM32
<STM32_PINMUX('H', 12, AF14)>, /* LCD_R6 */
				 
<STM32
<STM32_PINMUX('E', 15, AF14)>, /* LCD_R7 */
				 
<STM32
<STM32_PINMUX('E',  5, AF14)>, /* LCD_G0 */
				 
<STM32
<STM32_PINMUX('E',  6, AF14)>, /* LCD_G1 */
				 
<STM32
<STM32_PINMUX('H', 13, AF14)>, /* LCD_G2 */
				 
<STM32
<STM32_PINMUX('H', 14, AF14)>, /* LCD_G3 */
				 
<STM32
<STM32_PINMUX('H', 15, AF14)>, /* LCD_G4 */
				 
<STM32
<STM32_PINMUX('I',  0, AF14)>, /* LCD_G5 */
				 
<STM32
<STM32_PINMUX('I',  1, AF14)>, /* LCD_G6 */
				 
<STM32
<STM32_PINMUX('I',  2, AF14)>, /* LCD_G7 */
				 
<STM32
<STM32_PINMUX('D',  9, AF14)>, /* LCD_B0 */
				 
<STM32
<STM32_PINMUX('G', 12, AF14)>, /* LCD_B1 */
				 
<STM32
<STM32_PINMUX('G', 10, AF14)>, /* LCD_B2 */
				 
<STM32
<STM32_PINMUX('D', 10, AF14)>, /* LCD_B3 */
				 
<STM32
<STM32_PINMUX('I',  4, AF14)>, /* LCD_B4 */
				 
<STM32
<STM32_PINMUX('A',  3, AF14)>, /* LCD_B5 */
				 
<STM32
<STM32_PINMUX('B',  8, AF14)>, /* LCD_B6 */
				 
<STM32
<STM32_PINMUX('D',  8, AF14)>; /* LCD_B7 */
			bias-disable;
			drive-push-pull;
			slew-rate = 
<1>
<1>;
		};
	};

	ltdc_sleep_pins_a: ltdc-sleep-0 {
		pins {
			pinmux = 
<STM32
<STM32_PINMUX('G',  7, ANALOG)>, /* LCD_CLK */
				 
<STM32
<STM32_PINMUX('I', 10, ANALOG)>, /* LCD_HSYNC */
				 
<STM32
<STM32_PINMUX('I',  9, ANALOG)>, /* LCD_VSYNC */
				 
<STM32
<STM32_PINMUX('F', 10, ANALOG)>, /* LCD_DE */
				 
<STM32
<STM32_PINMUX('H',  2, ANALOG)>, /* LCD_R0 */
				 
<STM32
<STM32_PINMUX('H',  3, ANALOG)>, /* LCD_R1 */
				 
<STM32
<STM32_PINMUX('H',  8, ANALOG)>, /* LCD_R2 */
				 
<STM32
<STM32_PINMUX('H',  9, ANALOG)>, /* LCD_R3 */
				 
<STM32
<STM32_PINMUX('H', 10, ANALOG)>, /* LCD_R4 */
				 
<STM32
<STM32_PINMUX('C',  0, ANALOG)>, /* LCD_R5 */
				 
<STM32
<STM32_PINMUX('H', 12, ANALOG)>, /* LCD_R6 */
				 
<STM32
<STM32_PINMUX('E', 15, ANALOG)>, /* LCD_R7 */
				 
<STM32
<STM32_PINMUX('E',  5, ANALOG)>, /* LCD_G0 */
				 
<STM32
<STM32_PINMUX('E',  6, ANALOG)>, /* LCD_G1 */
				 
<STM32
<STM32_PINMUX('H', 13, ANALOG)>, /* LCD_G2 */
				 
<STM32
<STM32_PINMUX('H', 14, ANALOG)>, /* LCD_G3 */
				 
<STM32
<STM32_PINMUX('H', 15, ANALOG)>, /* LCD_G4 */
				 
<STM32
<STM32_PINMUX('I',  0, ANALOG)>, /* LCD_G5 */
				 
<STM32
<STM32_PINMUX('I',  1, ANALOG)>, /* LCD_G6 */
				 
<STM32
<STM32_PINMUX('I',  2, ANALOG)>, /* LCD_G7 */
				 
<STM32
<STM32_PINMUX('D',  9, ANALOG)>, /* LCD_B0 */
				 
<STM32
<STM32_PINMUX('G', 12, ANALOG)>, /* LCD_B1 */
				 
<STM32
<STM32_PINMUX('G', 10, ANALOG)>, /* LCD_B2 */
				 
<STM32
<STM32_PINMUX('D', 10, ANALOG)>, /* LCD_B3 */
				 
<STM32
<STM32_PINMUX('I',  4, ANALOG)>, /* LCD_B4 */
				 
<STM32
<STM32_PINMUX('A',  3, ANALOG)>, /* LCD_B5 */
				 
<STM32
<STM32_PINMUX('B',  8, ANALOG)>, /* LCD_B6 */
				 
<STM32
<STM32_PINMUX('D',  8, ANALOG)>; /* LCD_B7 */
		};
	};

A full example of the STM32MP15x Discovery board device tree is available in stm32mp15xx-dkx.dtsi [7].


	ltdc_pins_b: ltdc-1 {
		pins {
			pinmux = <STM32_PINMUX('I', 14, AF14)>, /* LCD_CLK */
				 <STM32_PINMUX('I', 12, AF14)>, /* LCD_HSYNC */
				 <STM32_PINMUX('I', 13, AF14)>, /* LCD_VSYNC */
				 <STM32_PINMUX('K',  7,