Ethernet switch device tree configuration

Revision as of 17:45, 20 October 2023 by Registered User (→‎DT configuration examples at board level)
Applicable for Unknown MPU

"STM32MP25" is not in the list (STM32MP13x, STM32MP15x, STM32MP25x) of allowed values for the "Has applicability specified for" property.

1. Article purpose[edit source]

This article explains how to configure the Ethernet when it is assigned to the Linux® OS. In this case, it is controlled by the Ethernet framework.

The configuration is performed using the device tree mechanism. This provides a hardware description of the Ethernet peripheral used by the STM32 DWMAC driver.

2. DT bindings documentation[edit source]

The Ethernet is a multifunction device.

Each function is represented by a separate binding document:

  • "Generic" Ethernet device tree bindings [1]
  • "Generic" Ethernet switch device tree bindings [2]
  • Specific STM32 ETH device tree bindings[3]

3. DT configuration[edit source]

This hardware description is a combination of the STM32 microprocessor device tree files (.dtsi extension) and board device tree files (.dts extension). See the Device tree for an explanation of the device tree file split.

3.1. DT configuration (STM32 level)[edit source]

Ethernet peripheral nodes are located in

  • for STM32MP25x lines More info.png in stm32mp257.dtsi [4] file,

In this file, the status must be set to disabled, and the following properties must be set:

  • Physical base address and size of the device register map
  • STM32 DWMAC interrupts
  • stmmaceth clock and Rx, Tx clocks

This is a set of properties that may not vary for a given STM32MP device, such as: register addresses, interrupts, clocks, ...

  switch0: ttt-sw@4c000000 {
	#address-cells  = <1>;
	#size-cells     = <1>;
	compatible = "st,stm32-deip";
	clock-names = "ethsw-bus-clk", "ethsw-clk",
		      "ethswacmcfg-bus-clk", "ethswacmmsg-bus-clk";
	clocks = <&rcc CK_BUS_ETHSW>,
		 <&rcc CK_KER_ETHSW>,
	st,syscon = <&syscfg 0x3800>;
	ranges = <0x4c000000 0x4c000000 0x2000000>,
		 <0x4b000000 0x4b000000 0xc0000>;
	feature-domains = <&rifsc STM32MP25_RIFSC_ETHSW_DEIP_ID>;
	status = "disabled";

	deip_sw0: deip-sw@4c000000 {
		compatible =  "ttt,deip-sw";
		reg = <0x4c000000 0x2000000>;
		interrupts = <GIC_SPI 250 IRQ_TYPE_LEVEL_HIGH>;

	acm@4b000000 {
		compatible = "ttt,acm-4.0";
		reg = <0x4b000000 0x00400>,
		      <0x4b010000 0x10000>,
		      <0x4b030000 0x10000>,
		      <0x4b050000 0x10000>,
		      <0x4b060000 0x20000>,
		      <0x4b080000 0x40000>;
		reg-names = "CommonRegister",
		buffers = <32>;
		ptp_worker = <&deip_sw0>;

The required and optional properties are fully described in the bindings files.

Warning white.png Warning
This device tree part is related to STM32 microprocessors. It must be kept as is, without being modified by the end-user.

3.2. Ethernet DT configuration (board level)[edit source]

Warning white.png Warning
These DT are same between U-Boot and kernel OS

The device tree board file (.dts) contains all hardware configurations related to board design. The DT node ("ethernet") must be updated to:

  • Enable the Ethernet block by setting status = "okay".
  • Configure the pins in use via pinctrl, through pinctrl-0 and pinctrl-names.
  • Configure Ethernet interface used phy-mode = "rgmii"., (rmii, mii, gmii).
  • Configure Ethernet max speed max-speed = <1000>"..
&eth1 {
	status = "okay";
	pinctrl-0 = <&eth1_mdio_pins_a>;
	pinctrl-names = "default";
	phy-mode = "rgmii";
	max-speed = <1000>;

	fixed_link: fixed-link {
		speed = <1000>;

	mdio1 {
		#address-cells = <1>;
		#size-cells = <0>;
		compatible = "snps,dwmac-mdio";

		phy1_eth1: ethernet-phy@4 {
			compatible = "ethernet-phy-id001c.c916",
			reg = <4>;

		phy2_eth1: ethernet-phy@5 {
			compatible = "ethernet-phy-id001c.c916",
			reg = <5>;

&switch0 {
	status = "okay";
	pinctrl-0 = <&eth1_rgmii_pins_a>, <&eth3_rgmii_pins_a>;
	pinctrl-names = "default";
	phy-mode = "rgmii";

3.3. DT configuration examples at board level[edit source]

The example below shows how to configure and enable an Ethernet instance

 &eth1 {

status = "okay"; /* enable eth1 */ pinctrl-0 = <&eth1_mdio_pins_a>; /* configure pinctrl mdio/mdc for eth1 */ pinctrl-names = "default"; phy-mode = "rgmii"; /* configure ethernet phy mode for eth1 */ max-speed = <1000>; /* configure ethernet max speed for eth1 */ st,eth-clk-sel; snps,ext-systime;

fixed_link: fixed-link { /* configure ethernet fixed-link for eth1 */ speed = <1000>; full-duplex; };

mdio1 { #address-cells = <1>; #size-cells = <0>; compatible = "snps,dwmac-mdio";

phy1_eth1: ethernet-phy@4 { compatible = "ethernet-phy-id001c.c916", "ethernet-phy-ieee802.3-c22"; realtek,eee-disable; reg = <4>; /* configure ethernet phy 1 @ for eth1 */ };

phy2_eth1: ethernet-phy@5 { compatible = "ethernet-phy-id001c.c916", "ethernet-phy-ieee802.3-c22"; realtek,eee-disable; reg = <5>; /* configure ethernet phy 2 @ for eth1 */ }; };

 &switch0 {

status = "okay"; pinctrl-0 = <&eth1_rgmii_pins_a>, <&eth3_rgmii_pins_a>; /* configure pinctrl for switch */ pinctrl-names = "default"; phy-mode = "rgmii"; st,ethsw-internal-125;


4. How to configure Ethernet using CubeMX[edit source]

The STM32CubeMX tool can be used to configure the STM32MPU device and get the corresponding platform configuration device tree files.
The STM32CubeMX may not support all the properties described in the above DT bindings documentation paragraph. If so, the tool inserts user sections in the generated device tree. These sections can then be edited to add some properties and they are preserved from one generation to another. Refer to STM32CubeMX user manual for further information.

5. References[edit source]