Difference between revisions of "FMC device tree configuration"

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Applicable for STM32MP13x lines, STM32MP15x lines

1 Article purpose[edit]

The purpose of this article is to explain how to configure the FMC using the device tree mechanism, relying on the bindings documentation, that is the description of the required and optional device-tree properties.

The peripheral can be assigned to different contexts/software components, depending on the final product needs. Refer to How to assign an internal peripheral to a runtime context article for guidelines on this configuration.

2 DT bindings documentation[edit]

The device tree binding documents are stored either in the given applicable components listed below, or in the Linux kernel repository:

3 DT configuration[edit]

This hardware description is a combination of the STM32 microprocessor device tree files (.dtsi extension) and board device tree files (.dts extension). See the Device tree for an explanation of the device-tree file organization.

STM32CubeMX can be used to generate the board device tree. Refer to How to configure the DT using STM32CubeMX for more details.

3.1 DT configuration (STM32 level)[edit]

The FMC node is located in the device tree file for the software components, supporting the peripheral and listed in the above DT bindings documentation paragraph.

Warning white.png Warning
This device tree part is related to STM32 microprocessors. It must be kept as is, without being modified by the end-user.

3.2 DT configuration (board level)[edit]

The objective of this chapter is to explain how to enable and configure the FMC DT nodes for a board.

Peripheral configuration should be done in specific board device tree files (board dts file and pinctrl dtsi file).

3.2.1 DT configuration of the external bus interface controller (board level)[edit]

The FMC external bus interface controller may connect up to four external devices.

   &fmc {                                                   Comments     
       pinctrl-names = "default", "sleep";                  --> For pinctrl configuration, please refer to Pinctrl device tree configuration
       pinctrl-0 = <&fmc2_pins_b>;
       pinctrl-1 = <&fmc2_sleep_pins_b>;
       status = "okay";                                     --> Enable the node

ksz8851: ks8851mll@1,0 { compatible = "micrel,ks8851-mll"; --> Configure the external device reg = <1 0x0 0x2>, <1 0x2 0x20000>; interrupt-parent = <&gpioc>; interrupts = <3 IRQ_TYPE_LEVEL_LOW>; bank-width = <2>;
st,fmc2-ebi-cs-mux-enable; --> Configure the transactions with the external device st,fmc2-ebi-cs-transaction-type = <4>; st,fmc2-ebi-cs-buswidth = <16>; st,fmc2-ebi-cs-address-setup-ns = <5>; st,fmc2-ebi-cs-address-hold-ns = <5>; st,fmc2-ebi-cs-bus-turnaround-ns = <5>; st,fmc2-ebi-cs-data-setup-ns = <45>; st,fmc2-ebi-cs-data-hold-ns = <1>; }; };

3.2.2 DT configuration of the NAND Flash controller (board level)[edit]

The FMC NAND Flash controller may connect to one SLC NAND Flash memory (with a maximum of 2 dies per package).

   &fmc {                                                   Comments     
       pinctrl-names = "default", "sleep";                  --> For pinctrl configuration, please refer to Pinctrl device tree configuration
       pinctrl-0 = <&fmc2_pins_a>;
       pinctrl-1 = <&fmc2_sleep_pins_a>;
       status = "okay";                                     --> Enable the node

nand-controller@4,0 { status = "okay"; --> Enable the NAND controller node
nand@0 { reg = <0>; --> Describe the CS line assigned to the NAND chip nand-on-flash-bbt; --> Store the bad block table on NAND Flash memory nand-ecc-strength = <8>; --> Number of bits to correct per ECC step nand-ecc-step-size = <512>; --> Number of data bytes that are covered by a single ECC step #address-cells = <1>; #size-cells = <1>; }; }; };

The supported ECC strength and step size are:

  • nand-ecc-strength = <1>, nand-ecc-step-size = <512> (HAMMING).
  • nand-ecc-strength = <4>, nand-ecc-step-size = <512> (BCH4).
  • nand-ecc-strength = <8>, nand-ecc-step-size = <512> (BCH8).
Warning white.png Warning
It is recommended to check the ECC requirements in the datasheet of the memory provider.

3.3 DT configuration examples[edit]

The below example shows how to configure the FMC NAND Flash controller when a SLC 8-bit NAND Flash memory device is connected (ECC requirement: 8 bits / 512 bytes).

   &fmc {                                              
       pinctrl-names = "default", "sleep";                  
       pinctrl-0 = <&fmc2_pins_a>;
       pinctrl-1 = <&fmc2_sleep_pins_a>;
       status = "okay"; 
nand-controller@4,0 { status = "okay";
nand: nand@0 { reg = <0>; nand-on-flash-bbt; #address-cells = <1>; #size-cells = <1>;
partition@0 { ... }; }; }; };

The below example shows how to configure the FMC NAND Flash controller when a SLC 8-bit NAND Flash memory device is connected (ECC requirement: 4 bits / 512 bytes).

   &fmc {                        
       pinctrl-names = "default", "sleep";            
       pinctrl-0 = <&fmc2_pins_a>;
       pinctrl-1 = <&fmc2_sleep_pins_a>;
       status = "okay";
nand-controller@4,0 { status = "okay";
nand: nand@0 { reg = <0>; nand-on-flash-bbt; nand-ecc-strength = <4>; nand-ecc-step-size = <512>; #address-cells = <1>; #size-cells = <1>;
partition@0 { ... }; }; }; };

4 How to configure the DT using STM32CubeMX[edit]

The STM32CubeMX tool can be used to configure the STM32MPU device and get the corresponding platform configuration device tree files.
STM32CubeMX may not support all the properties described in DT binding files listed in the above DT bindings documentation paragraph. If so, the tool inserts user sections in the generated device tree. These sections can then be edited to add some properties, and they are preserved from one generation to another. Refer to STM32CubeMX user manual for further information.

5 References[edit]

Refer to the following links for additional information:



<noinclude>{{ApplicableFor
|MPUs list=STM32MP13x, STM32MP15x
|MPUs checklist=STM32MP13x,STM32MP15x
}}</noinclude>


== Article purpose ==
The purpose of this article is to explain how to configure the [[FMC internal peripheral|'''FMC''']] using the [[Device tree|device tree]] mechanism, relying on the bindings documentation, that is the description of the required and optional device-tree properties.

The peripheral can be assigned to different contexts/software components, depending on the final product needs. Refer to [[How to assign an internal peripheral to a runtime context]] article for guidelines on this configuration.

== DT bindings documentation ==
The device tree binding documents are stored either in the given applicable components listed below, or in the Linux kernel repository: <br>


* TF-A BL2, U-Boot, OP-TEE, Linux<sup>&reg;</sup> OS:
** Generic MTD NAND device tree bindings: {{CodeSource | Linux kernel | Documentation/devicetree/bindings/mtd/nand-controller.yaml}}.
** FMC NAND Flash controller device tree bindings: {{CodeSource | Linux kernel | Documentation/devicetree/bindings/mtd/st,stm32-fmc2-nand.yaml}}.
** FMC external bus interface device tree bindings: {{CodeSource | Linux kernel | Documentation/devicetree/bindings/memory-controllers/st,stm32-fmc2-ebi.yaml}}.

== DT configuration ==
This hardware description is a combination of the '''STM32 microprocessor''' device tree files (''.dtsi'' extension) and '''board''' device tree files (''.dts'' extension). See the [[Device tree]] for an explanation of the device-tree file organization.

'''STM32CubeMX''' can be used to generate the board device tree. Refer to [[#How_to_configure_the_DT_using_STM32CubeMX|How to configure the DT using STM32CubeMX]] for more details.

===DT configuration (STM32 level) ===
The FMC node is located in the [[STM32 MPU device_tree#Device tree structure|device tree file]] for the software components, supporting the peripheral and listed in the above [[#DT bindings documentation|DT bindings documentation]] paragraph.

{{Warning|This device tree part is related to STM32 microprocessors. It must be kept as is, without being modified by the end-user.}}

=== DT configuration (board level) ===
The objective of this chapter is to explain how to enable and configure the  FMC DT nodes for a board.

Peripheral configuration should be done in specific board device tree files (board dts file  and [[Pinctrl device tree configuration|pinctrl  dtsi file]]).

==== DT configuration of the external bus interface controller (board level) ====
The FMC external bus interface controller may connect up to four external devices. 

    &fmc {                                                   {{highlight|Comments}}     
        pinctrl-names = "default", "sleep";                  {{highlight|--> For pinctrl configuration, please refer to [[Pinctrl device tree configuration]]}}
        pinctrl-0 = <&fmc2_pins_b>;
        pinctrl-1 = <&fmc2_sleep_pins_b>;
        status = "okay";                                     {{highlight|--> Enable the node}}<br>

        ksz8851: ks8851mll@1,0 { 
            compatible = "micrel,ks8851-mll";                {{highlight|--> Configure the external device}}
            reg = <1 0x0 0x2>, <1 0x2 0x20000>;
            interrupt-parent = <&gpioc>;
            interrupts = <3 IRQ_TYPE_LEVEL_LOW>;
            bank-width = <2>;<br>

            st,fmc2-ebi-cs-mux-enable;                       {{highlight|--> Configure the transactions with the external device}}
            st,fmc2-ebi-cs-transaction-type = <4>;
            st,fmc2-ebi-cs-buswidth = <16>;
            st,fmc2-ebi-cs-address-setup-ns = <5>;
            st,fmc2-ebi-cs-address-hold-ns = <5>;
            st,fmc2-ebi-cs-bus-turnaround-ns = <5>;
            st,fmc2-ebi-cs-data-setup-ns = <45>;
            st,fmc2-ebi-cs-data-hold-ns = <1>;
        };
    };

==== DT configuration of the NAND Flash controller (board level) ====
The FMC NAND Flash controller may connect to one SLC NAND Flash memory (with a maximum of 2 dies per package).

    &fmc {                                                   {{highlight|Comments}}     
        pinctrl-names = "default", "sleep";                  {{highlight|--> For pinctrl configuration, please refer to [[Pinctrl device tree configuration]]}}
        pinctrl-0 = <&fmc2_pins_a>;
        pinctrl-1 = <&fmc2_sleep_pins_a>;
        status = "okay";                                     {{highlight|--> Enable the node}}<br>

        nand-controller@4,0 {
            status = "okay";                                 {{highlight|--> Enable the NAND controller node}}<br>

            nand@0 {
                reg = <0>;                                   {{highlight|--> Describe the CS line assigned to the NAND chip}}
                nand-on-flash-bbt;                           {{highlight|--> Store the bad block table on NAND Flash memory}}
                nand-ecc-strength = <8>;                     {{highlight|--> Number of bits to correct per ECC step}}
                nand-ecc-step-size = <512>;                  {{highlight|--> Number of data bytes that are covered by a single ECC step}}
                #address-cells = <1>;
                #size-cells = <1>;
            };
        };
    };

The supported ECC strength and step size are:
* nand-ecc-strength = <1>, nand-ecc-step-size = <512> (HAMMING).
* nand-ecc-strength = <4>, nand-ecc-step-size = <512> (BCH4).
* nand-ecc-strength = <8>, nand-ecc-step-size = <512> (BCH8).

{{Warning|It is recommended to check the ECC requirements in the datasheet of the memory provider.}}

=== DT configuration examples ===
The below example shows how to configure the FMC NAND Flash controller when a SLC 8-bit NAND Flash memory device is connected (ECC requirement: 8 bits / 512 bytes).

    &fmc {                                              
        pinctrl-names = "default", "sleep";                  
        pinctrl-0 = <&fmc2_pins_a>;
        pinctrl-1 = <&fmc2_sleep_pins_a>;
        status = "okay"; <br>

        nand-controller@4,0 {
            status = "okay"; <br>                                      

            nand: nand@0 {
                reg = <0>;                                       
                nand-on-flash-bbt;                                                   
                #address-cells = <1>;
                #size-cells = <1>;<br>

                partition@0 {
                    ...
                };
            };
        };
    };

The below example shows how to configure the FMC NAND Flash controller when a SLC 8-bit NAND Flash memory device is connected (ECC requirement: 4 bits / 512 bytes).

    &fmc {                        
        pinctrl-names = "default", "sleep";            
        pinctrl-0 = <&fmc2_pins_a>;
        pinctrl-1 = <&fmc2_sleep_pins_a>;
        status = "okay";<br>

        nand-controller@4,0 {
            status = "okay"; <br>                                      

            nand: nand@0 {
                reg = <0>;                                       
                nand-on-flash-bbt;
                nand-ecc-strength = <4>;
                nand-ecc-step-size = <512>;                                                  
                #address-cells = <1>;
                #size-cells = <1>;<br>

                partition@0 {
                    ...
                };  
            };
        };
    };

==How to configure the DT using STM32CubeMX==
The [[STM32CubeMX]] tool can be used to configure the STM32MPU device and get the corresponding [[Device_tree#STM32|platform configuration device tree]] files.<br />

STM32CubeMX may not support all the properties described in DT binding files listed in the above [[#DT bindings documentation|DT bindings documentation]] paragraph. If so, the tool inserts '''user sections''' in the generated device tree. These sections can then be edited to add some properties, and they are preserved from one generation to another. Refer to [[STM32CubeMX]] user manual for further information.

==References==
Refer to the following links for additional information:<references />

<noinclude>

{{ArticleBasedOnModel | Peripheral or framework device tree configuration model}}
[[Category:Device tree configuration]]
[[Category:Mass storage]]</noinclude>
Line 28: Line 28:
   
 
=== DT configuration (board level) ===
 
=== DT configuration (board level) ===
The objective of this chapter is to explain how to enable and configure the FMC DT nodes for a board.
+
The objective of this chapter is to explain how to enable and configure the FMC DT nodes for a board.
   
 
Peripheral configuration should be done in specific board device tree files (board dts file  and [[Pinctrl device tree configuration|pinctrl  dtsi file]]).
 
Peripheral configuration should be done in specific board device tree files (board dts file  and [[Pinctrl device tree configuration|pinctrl  dtsi file]]).