Last edited 3 months ago

Coprocessor management overview

Applicable for STM32MP15x lines, STM32MP25x lines

This article provides an overview of the management of the heterogeneous asymmetric architecture implemented in the STM32 MPU microprocessor family. It provides information on mechanisms put in place to help developers to design software in the multiprocessor system.

1. System overview[edit | edit source]

The STM32 MPU multiprocessor system allows to run independent firmwares on each CPU core. The below subsystems are involved in the management of the coexistence of the two CPU subsystems:

Copro-hw-overview.png

2. Functional features and design[edit | edit source]

In order to manage the coprocessor system, a list of services is proposed relying on the open-source RemoteProc and RPMsg frameworks. These frameworks are introduced in chapters below with links to dedicated articles for further explanation.

Copro-sw-overview.png

2.1. Load and control the Cortex-M firmware[edit | edit source]

The Linux OS integrates the RemoteProc framework that allows to load firmware and control remote processors.


2.2. Resources management (for shared peripheral, clocks, GPIOs...)[edit | edit source]

2.2.1. STM32MP15x lines More info.png[edit | edit source]

The resource manager proposes services to manage common resources and avoid any conflict.

  • Peripheral assignment request: the mechanism used to ensure that a peripheral is reserved for a processor usage. The principle is that a firmware requests the peripheral before starting to use it, relying on the ETZPC table.
  • Coprocessor resource configuration set: services available in the main processor (Cortex-A running Linux) to configure the system resources needed to operate the peripheral on the coprocessor. The service is implemented by rproc_srm[1] [2] drivers.

2.2.2. STM32MP25x lines More info.png[edit | edit source]

At boot time the resource isolation framework (RIF) configure the system to manage common resources and to assign/isolate/share peripherals.

2.3. Inter processor communication[edit | edit source]

Inter processor communication is based on RPMsg framework and Mailbox mechanisms.

Copro-sw-ipc-overview.png

3. References[edit | edit source]