1. Article purpose[edit source]
This article explains how to configure the DCMI internal peripheral when assigned to the Linux® OS. In that case, it is controlled by the V4L2 camera framework.
The configuration is performed using the device tree mechanism that provides a hardware description of the DCMI peripheral, used by the STM32 DCMI Linux driver or by the V4L2 camera framework.
If the peripheral is assigned to another execution context, refer to How to assign an internal peripheral to an execution context article for guidelines on peripheral assignment and configuration.
2. DT bindings documentation[edit source]
The DCMI internal peripheral is documented through the STM32 DCMI device tree bindings file[1].
3. DT configuration[edit source]
This hardware description is a combination of the STM32 microprocessor device tree files (.dtsi extension) and board device tree files (.dts extension). See the device tree article for an explanation of the device tree file split.
STM32CubeMX can be used to generate the board device tree. Refer to How to configure the DT using STM32CubeMX for more details.
3.1. DT configuration (STM32/SoC level)[edit source]
3.1.1. For STM32MP15x lines
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The DCMI device tree node is declared in stm32mp151.dtsi [2]. The declaration (shown below) provides the hardware registers base address, interrupts, reset line, clocks and dma channel used.
... etzpc: etzpc@5c007000 { ... dcmi: dcmi@4c006000 { compatible = "st,stm32-dcmi"; reg = <0x4c006000 0x400>; interrupts = <GIC_SPI 78 IRQ_TYPE_LEVEL_HIGH>; resets = <&rcc CAMITF_R>; clocks = <&rcc DCMI>; clock-names = "mclk"; dmas = <&dmamux1 75 0x400 0x01>; dma-names = "tx"; feature-domains = <&etzpc STM32MP1_ETZPC_DCMI_ID>; status = "disabled"; }; ...
When using a different sensor camera device, only the sensor-related configuration part must be adapted in the associated board device tree file (see #DT configuration (board level)).
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DCMI capture performance can be increased by relying on a 2nd DMA channel and SRAM located intermediate buffer in order to achieve DMA / MDMA chaining. DCMI driver is configured to achieve this by giving a 2nd DMA channel entry and a sram pool phandle into the dcmi node. Such configuration is done in the board DT, the following section gives such example.
Refer to stm32-dcmi bindings[1] for more details. |
3.1.2. For STM32MP25x lines
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The DCMI device tree node is declared in stm32mp251.dtsi [3]. The declaration (shown below) provides the hardware registers base address, interrupts, reset line and clocks used.
... rifsc: rifsc@42080000 { ... dcmi: dcmi@404a0000 { compatible = "st,stm32-dcmi"; reg = <0x404a0000 0x400>; interrupts = <GIC_SPI 141 IRQ_TYPE_LEVEL_HIGH>; resets = <&rcc CCI_R>; clocks = <&rcc CK_BUS_CCI>; clock-names = "mclk"; dmas = <&hpdma 137 0x60 0x00003012 0>; dma-names = "tx"; feature-domains = <&rifsc STM32MP25_RIFSC_DCMI_PSSI_ID>; power-domains = <&CLUSTER_PD>; status = "disabled"; }; ...
When using a different sensor camera device, only the sensor-related configuration part must be adapted in the associated board device tree file (see #DT configuration (board level)).
3.2. DT configuration (board level)[edit source]
3.2.1. For STM32MP15x lines
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&dcmi {
status = "okay";
pinctrl-names = "default", "sleep";
pinctrl-0 = <&dcmi_pins_a>;
pinctrl-1 = <&dcmi_sleep_pins_a>;
/*
* Enable DMA-MDMA chaining by adding a SRAM pool and
* a MDMA channel
*/
sram = <&dcmi_pool>;
dmas = <&dmamux1 75 0x400 0x01>, <&mdma1 0 0x3 0x1200000a 0 0>;
dma-names = "tx", "mdma_tx";
port {
dcmi_0: endpoint {
remote-endpoint = <&ov5640_0>;
bus-type = <5>;
bus-width = <8>;
hsync-active = <0>;
vsync-active = <0>;
pclk-sample = <1>;
pclk-max-frequency = <77000000>;
};
};
};
...
&sram4 {
dcmi_pool: dcmi_pool@0 {
reg = <0x0 0x8000>;
pool;
};
};
...
This section, part of the STM32MP15 evaluation board device tree file[4], shows how is configured the DCMI hardware block to interconnect with the sensor camera device. In this example, DMA-MDMA chaining is enabled by allocating a buffer area within the SRAM and updating the dmas property of the dcmi node to indicate both DMA and MDMA channels. The configurable settings are the following:
- Camera sensor endpoint: in this case, the Omnivision OV5640 model[5].
- Bus width: 8, 10, 12 or 14 bits
- Horizontal synchronization line level: active low (0) or active high (1)
- Vertical synchronization line level: active low (0) or active high (1)
- Pixel clock polarity line level: active low (0) or active high (1)
- Pixel clock maximum frequency in Hertz
This section also defines what is the DCMI pins multiplexing used for this board (<&dcmi_pins_a>, <&dcmi_sleep_pins_a>), exact pins details being defined in the STM32MP15 evaluation board pinctrl device tree file[6]:
dcmi_pins_a: dcmi-0 { pins { pinmux = <STM32_PINMUX('H', 8, AF13)>,/* DCMI_HSYNC */ <STM32_PINMUX('B', 7, AF13)>,/* DCMI_VSYNC */ <STM32_PINMUX('A', 6, AF13)>,/* DCMI_PIXCLK */ <STM32_PINMUX('H', 9, AF13)>,/* DCMI_D0 */ <STM32_PINMUX('H', 10, AF13)>,/* DCMI_D1 */ <STM32_PINMUX('H', 11, AF13)>,/* DCMI_D2 */ <STM32_PINMUX('H', 12, AF13)>,/* DCMI_D3 */ <STM32_PINMUX('H', 14, AF13)>,/* DCMI_D4 */ <STM32_PINMUX('I', 4, AF13)>,/* DCMI_D5 */ <STM32_PINMUX('B', 8, AF13)>,/* DCMI_D6 */ <STM32_PINMUX('E', 6, AF13)>,/* DCMI_D7 */ <STM32_PINMUX('I', 1, AF13)>,/* DCMI_D8 */ <STM32_PINMUX('H', 7, AF13)>,/* DCMI_D9 */ <STM32_PINMUX('I', 3, AF13)>,/* DCMI_D10 */ <STM32_PINMUX('H', 15, AF13)>;/* DCMI_D11 */ bias-disable; }; }; dcmi_sleep_pins_a: dcmi-sleep-0 { pins { pinmux = <STM32_PINMUX('H', 8, ANALOG)>,/* DCMI_HSYNC */ <STM32_PINMUX('B', 7, ANALOG)>,/* DCMI_VSYNC */ <STM32_PINMUX('A', 6, ANALOG)>,/* DCMI_PIXCLK */ <STM32_PINMUX('H', 9, ANALOG)>,/* DCMI_D0 */ <STM32_PINMUX('H', 10, ANALOG)>,/* DCMI_D1 */ <STM32_PINMUX('H', 11, ANALOG)>,/* DCMI_D2 */ <STM32_PINMUX('H', 12, ANALOG)>,/* DCMI_D3 */ <STM32_PINMUX('H', 14, ANALOG)>,/* DCMI_D4 */ <STM32_PINMUX('I', 4, ANALOG)>,/* DCMI_D5 */ <STM32_PINMUX('B', 8, ANALOG)>,/* DCMI_D6 */ <STM32_PINMUX('E', 6, ANALOG)>,/* DCMI_D7 */ <STM32_PINMUX('I', 1, ANALOG)>,/* DCMI_D8 */ <STM32_PINMUX('H', 7, ANALOG)>,/* DCMI_D9 */ <STM32_PINMUX('I', 3, ANALOG)>,/* DCMI_D10 */ <STM32_PINMUX('H', 15, ANALOG)>;/* DCMI_D11 */ }; };
An alternate pin multiplexing could be defined (for example to fit a new board design) by modifying the STM32MP15 evaluation board pinctrl device tree file[6] following the possible pins assignment defined in the MPU reference manual[7].
STM32CubeMX [8] pins configurator is of great help to find valid alternatives thanks to its visual GUI.
Refer to STM32 DCMI bindings[1] for more details.
3.2.2. For STM32MP25x lines
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Add information regarding DCMI example (not available yet on any official STM32MP25 boards). |
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Add information regarding the DCMI/DCMIPP pinctrl file related to parallel sensor GPIOs. |
An alternate pin multiplexing could be defined (for example to fit a new board design) by using the Linux kernel STM32MP25 pinctrl device tree file (stm32mp25-pinctrl.dtsi)[9] following the possible pins assignment defined in the MPU reference manual[10].
STM32CubeMX [11] pins configurator is of great help to find valid alternatives thanks to its visual GUI.
Refer to STM32 DCMI bindings[1] for more details.
3.3. DT configuration examples[edit source]
... &dcmi { status = "okay"; pinctrl-names = "default", "sleep"; pinctrl-0 = <&dcmi_pins_a>; pinctrl-1 = <&dcmi_sleep_pins_a>; /* * Enable DMA-MDMA chaining by adding a SRAM pool and * a MDMA channel */ sram = <&dcmi_pool>; dmas = <&dmamux1 75 0x400 0x01>, <&mdma1 0 0x3 0x1200000a 0 0>; dma-names = "tx", "mdma_tx"; port { dcmi_0: endpoint { remote-endpoint = <&ov5640_0>; bus-type = <5>; bus-width = <8>; hsync-active = <0>; vsync-active = <0>; pclk-sample = <1>; pclk-max-frequency = <77000000>; }; }; }; ... &i2c2 { ... ov5640: camera@3c { compatible = "ovti,ov5640"; reg = <0x3c>; clocks = <&clk_ext_camera>; clock-names = "xclk"; DOVDD-supply = <&v2v8>; powerdown-gpios = <&stmfx_pinctrl 18 (GPIO_ACTIVE_HIGH | GPIO_PUSH_PULL)>; reset-gpios = <&stmfx_pinctrl 19 (GPIO_ACTIVE_LOW | GPIO_PUSH_PULL)>; rotation = <180>; status = "okay"; port { ov5640_0: endpoint { remote-endpoint = <&dcmi_0>; bus-width = <8>; data-shift = <2>; /* lines 9:2 are used */ hsync-active = <0>; vsync-active = <0>; pclk-sample = <1>; pclk-max-frequency = <77000000>; }; }; }; ...
This section, part of the STM32MP15 evaluation board device tree file[4], enables the support of the OV5640 Omnivision camera sensor[5] located on the MB1379 camera daughter board[12] connected to the CN7 camera connector[13] of the STM32MP15 evaluation board[14].
Refer to the OV5640 bindings [5] for more details.
Documentation on various V4L2 camera sensors can be found inside I2C media bindings folder[15]. Refer to the dedicated sensor binding documentation to adapt your board device tree file to this dedicated sensor.
4. How to configure the DT using STM32CubeMX[edit source]
The STM32CubeMX tool can be used to configure the STM32MPU device and get the corresponding platform configuration device tree files.
The STM32CubeMX may not support all the properties described in the above DT bindings documentation paragraph. If so, the tool inserts user sections in the generated device tree. These sections can then be edited to add some properties and they are preserved from one generation to another. Refer to STM32CubeMX user manual for further information.
5. References[edit source]
Please refer to the following links for additional information:
- ↑ 1.0 1.1 1.2 1.3 Linux kernel STM32 DCMI bindings (st,stm32-dcmi.yaml)
- ↑ Linux kernel STM32MP157C device tree (stm32mp157c.dtsi
- ↑ Linux kernel STM32MP251 device tree (stm32mp251.dtsi
- ↑ 4.0 4.1 Linux kernel STM32MP157 evaluation board device tree (stm32mp157f-ev1.dts)
- ↑ 5.0 5.1 5.2 Linux kernel OV5640 bindings (ovti,ov5640.yaml)
- ↑ 6.0 6.1 Linux kernel STM32MP15 pinctrl device tree (stm32mp15-pinctrl.dtsi)
- ↑ STM32MP15 reference manuals
- ↑ STM32CubeMX
- ↑ Linux kernel STM32MP25 pinctrl device tree file (stm32mp25-pinctrl.dtsi)
- ↑ STM32MP25 reference manuals
- ↑ STM32CubeMX
- ↑ MB1379 camera daughter board
- ↑ STM32MP157x-EV1 Evaluation board CN7 Camera sensor connector
- ↑ STM32MP15 evaluation board
- ↑ Linux kernel I2C media devices bindings (bindings/media/i2c)