# v5.0
####################################################################
######################## debug config. #############################
####################################################################
# Set debug phase:
#	1: Attach at TF-A BL2
#	2: Attach at TF-A BL32 or OP-TEE
#	3: Attach at SSBL (U-Boot)
#	4: Attach at Linux kernel
set $debug_phase = 3

# Set debug mode:
#	0: Attach at boot
#	1: Attach running target
set $debug_mode = 0

# Set debug trusted bootchain:
#	0: TF-A BL2 / TF-A BL32 / U-Boot / Linux kernel
#	1: TF-A BL2 / OP-TEE / U-Boot / Linux kernel
set $debug_trusted_bootchain = 0

####################################################################

# Set environment configuration
source Path_env.gdb

####################################################################
########################## functions ###############################
####################################################################
define break_boot_bl32
	thbreak sp_min_entrypoint
	c
end

define break_boot_optee
	thbreak generic_entry_a32.S:_start
	c
end

define break_boot_uboot
	thbreak vectors.S:_start
	c
end

define break_boot_linuxkernel
	thbreak stext
	c
end

define mem_enable
	mem auto
end

define mem_disable
	mem 0 4 ro 8 nocache
end
####################################################################


######################## common config. ############################
# Disables confirmation requests
set confirm off
set mem inaccessible-by-default
mem_disable
# set debug remote 1

# Connection to the host gdbserver port for Cortex-A7 SMP
target extended-remote localhost:3333

# Configure GDB for OpenOCD
set remote hardware-breakpoint-limit 6
set remote hardware-watchpoint-limit 4

# Switch to Core0, no SMP for the moment. We'll re-enable it in kernel
monitor cortex_a smp off
monitor targets stm32mp15x.cpu0

# Get load address for BL32 or OP-TEE
if $debug_trusted_bootchain == 0
	#get load-address of BL32
	symload_bl32
	set $bl32_load_addr = sp_min_entrypoint
else
	#get load-address of OP-TEE
	symload_optee
	set $optee_load_addr = _start
end

# Force reset mode in case where debug_phase is 1(TF-A BL2) or 2(TF-A BL32 or OP-TEE)
if $debug_phase <= 2
	set $debug_mode = 0
end

####################################################################

# Reset the system and halt in bootrom to attach at boot
if $debug_mode == 0
	symload_bl2

	monitor reset halt
	monitor gdb_sync
	stepi

	# we halt at tf-a entry point. Nothing to do for $debug_phase == 1

	# Stop at TF-A BL32 or OP-TEE entry point
	if $debug_phase == 2
		if $debug_trusted_bootchain == 0
			symadd_bl32 $bl32_load_addr
			break_boot_bl32
		else
			symadd_optee $optee_load_addr
			break_boot_optee
		end
	end

	# Stop at U-Boot entry point
	if $debug_phase == 3
		symload_uboot
		break_boot_uboot
	end

	# Stop at Linux kernel entry point
	if $debug_phase == 4
		symload_vmlinux
		break_boot_linuxkernel
		# in kernel re-enable SMP
		monitor cortex_a smp on
	end
end

# Target state is now aligned with gdb, enable memory read
mem_enable

####################################################################

# Set hardware breakpoint mode for TF-A OP-TEE and U-Boot
if $debug_phase <= 3
	monitor gdb_breakpoint_override hard
end

####################################################################

# Attach running target
if $debug_mode == 1
	# Halt in U-Boot
	if $debug_phase == 3
		symload_uboot
		# Relocate U-Boot symbols
		symadd_uboot
		if $debug_trusted_bootchain == 0
			symadd_bl32 $bl32_load_addr
        else
			symadd_optee $optee_load_addr
		end
	end

	# Halt in Linux kernel
	if $debug_phase == 4
		symload_vmlinux
		if $debug_trusted_bootchain == 0
			symadd_bl32 $bl32_load_addr
		else
			symadd_optee $optee_load_addr
		end
		# in kernel re-enable SMP
		monitor cortex_a smp on
end