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QUADSPI internal peripheral - Revision history
2024-03-28T10:56:15Z
Revision history for this page on the wiki
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https://wiki.st.com/stm32mpu-ecosystem-v2/index.php?title=QUADSPI_internal_peripheral&diff=60466&oldid=prev
Christophe Kerello at 12:51, 16 September 2019
2019-09-16T12:51:15Z
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<td colspan="2" style="background-color: #fff; color: #222; text-align: center;">Revision as of 12:51, 16 September 2019</td>
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Christophe Kerello
https://wiki.st.com/stm32mpu-ecosystem-v2/index.php?title=QUADSPI_internal_peripheral&diff=60453&oldid=prev
Christophe Kerello at 12:16, 16 September 2019
2019-09-16T12:16:22Z
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<tr><td class='diff-marker'>−</td><td style="color: #222; font-size: 88%; border-style: solid; border-width: 1px 1px 1px 4px; border-radius: 0.33em; border-color: #ffe49c; vertical-align: top; white-space: pre-wrap;"><div><del style="font-weight: bold; text-decoration: none;"></del></div></td><td colspan="2"> </td></tr>
<tr><td class='diff-marker'> </td><td style="background-color: #f8f9fa; color: #222; font-size: 88%; border-style: solid; border-width: 1px 1px 1px 4px; border-radius: 0.33em; border-color: #eaecf0; vertical-align: top; white-space: pre-wrap;"><div>==Article purpose==</div></td><td class='diff-marker'> </td><td style="background-color: #f8f9fa; color: #222; font-size: 88%; border-style: solid; border-width: 1px 1px 1px 4px; border-radius: 0.33em; border-color: #eaecf0; vertical-align: top; white-space: pre-wrap;"><div>==Article purpose==</div></td></tr>
<tr><td class='diff-marker'> </td><td style="background-color: #f8f9fa; color: #222; font-size: 88%; border-style: solid; border-width: 1px 1px 1px 4px; border-radius: 0.33em; border-color: #eaecf0; vertical-align: top; white-space: pre-wrap;"><div>The purpose of this article is to</div></td><td class='diff-marker'> </td><td style="background-color: #f8f9fa; color: #222; font-size: 88%; border-style: solid; border-width: 1px 1px 1px 4px; border-radius: 0.33em; border-color: #eaecf0; vertical-align: top; white-space: pre-wrap;"><div>The purpose of this article is to</div></td></tr>
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Christophe Kerello
https://wiki.st.com/stm32mpu-ecosystem-v2/index.php?title=QUADSPI_internal_peripheral&diff=49509&oldid=prev
Frq08988 at 16:17, 18 January 2019
2019-01-18T16:17:02Z
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<p><b>New page</b></p><div><noinclude><br />
{{ArticleBasedOnModel | [[Internal peripheral article model]]}}<br />
{{ArticleMainWriter | ChristopheK}}<br />
{{ArticleApprovedVersion | GeraldB | ChristopheK, LudovicB, GwenT, NathalieS | No previous approved version | BrunoB - 11Jun'18 - 7753 | 11Jun'18}}<br />
<br />
[[Category:Mass storage peripherals]]<br />
</noinclude><br />
<br />
==Article purpose==<br />
The purpose of this article is to<br />
* briefly introduce the QUADSPI peripheral and its main features<br />
* indicate the level of security supported by this hardware block<br />
* explain how each instance can be allocated to the three runtime contexts and linked to the corresponding software components<br />
* explain, when needed, how to configure the QUADSPI peripheral.<br />
<br />
==Peripheral overview==<br />
The Quad-SPI interface ('''QUADSPI''' peripheral) is used to interface the processor with serial NOR Flash and serial NAND Flash memories. <br /><br />
It supports:<br />
* Single, dual or quad SPI Flash memories<br />
* A dual-flash mode, allowing to agregate two Flash memories into a virtual single one<br />
* Dual data rate and memory-mapped modes.<br />
<br />
===Features===<br />
Refer to [[STM32MP15 resources#Reference manuals|STM32MP15 reference manuals]] for the complete list of features, and to the software components, introduced below, to know which features are really implemented.<br />
<br />
===Security support===<br />
QUADSPI is '''non secure''' peripheral.<br />
<br />
==Using the peripheral - associated software==<br />
===Boot time===<br />
QUADSPI instance is boot device that support serial boot for Flash programming with [[STM32CubeProgrammer]].<br />
<br />
===Runtime===<br />
====Overview====<br />
The QUADSPI instances can be allocated to:<br />
* the Arm<sup>&reg;</sup> Cortex<sup>&reg;</sup>-A7 non-secure core to be controlled in Linux<sup>&reg;</sup> by the [[MTD overview|MTD]] framework<br />
or<br />
* the Arm<sup>&reg;</sup> Cortex<sup>&reg;</sup>-M4 to be controlled in STM32Cube MPU Package by [[STM32CubeMP1 architecture|QUADSPI HAL driver]]<br />
<br />
Chapter [[#Peripheral assignment]] describes which peripheral instances can be assigned to which context.<br />
<br />
====Software frameworks====<br />
{{:Internal_peripherals_software_table_template}}<br />
| Mass storage<br />
| [[QUADSPI internal peripheral|QUADSPI]]<br />
| <br />
| [[MTD overview|Linux MTD framework]]<br />
| [[STM32CubeMP1 architecture|STM32Cube QUADSPI driver]]<br />
|<br />
|-<br />
|}<br />
<br />
====Peripheral configuration====<br />
The configuration is applied by the firmware running in the context to which the peripheral is assigned. The configuration can be done alone via the [[STM32CubeMX]] tool for all internal peripherals, and then manually completed (particularly for external peripherals), according to the information given in the corresponding software framework article.<br />
<br />
For Linux kernel configuration, please refer to [[QUADSPI device tree configuration]].<br />
<br />
====Peripheral assignment====<br />
{{:Internal_peripherals_assignment_table_template}}<br />
<onlyinclude><br />
| rowspan="1" | Mass storage<br />
| rowspan="1" | [[QUADSPI internal peripheral|QUADSPI]]<br />
| QUADSPI<br />
|<br />
| <span title="assignable peripheral" style="font-size:21px">☐</span><br />
| <span title="assignable peripheral" style="font-size:21px">☐</span><br />
| Assignment (single choice)<br />
|-<br />
</onlyinclude><br />
|}<br />
<br />
==How to go further==<br />
<br />
==References==<br />
<references/></div>
Frq08988